gem5/arch/mips/isa/formats/branch.isa

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////////////////////////////////////////////////////////////////////
//
// Branch instructions
//
output header {{
/**
* Base class for integer operations.
*/
class Branch : public MipsStaticInst
{
protected:
/// Constructor
Branch(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
{
}
std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
};
}};
output decoder {{
std::string Branch::generateDisassembly(Addr pc, const SymbolTable *symtab) const
{
return "Disassembly of integer instruction\n";
}
}};
def template BranchExecute {{
Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const
{
//Attempt to execute the instruction
try
{
checkPriv;
%(op_decl)s;
%(op_rd)s;
%(code)s;
}
//If we have an exception for some reason,
//deal with it
catch(MipsException except)
{
//Deal with exception
return No_Fault;
}
//Write the resulting state to the execution context
%(op_wb)s;
return No_Fault;
}
}};
def format CondBranch(code) {{
code = 'bool cond;\n' + code + '\nif (cond) NPC = NPC + disp;\n';
iop = InstObjParams(name, Name, 'Branch', CodeBlock(code),
('IsDirectControl', 'IsCondControl'))
header_output = BasicDeclare.subst(iop)
decoder_output = BasicConstructor.subst(iop)
decode_block = BasicDecode.subst(iop)
exec_output = BasicExecute.subst(iop)
}};