2005-01-15 10:12:25 +01:00
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# Copyright (c) 2004 The Regents of The University of Michigan
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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from __future__ import generators
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2005-03-08 02:56:02 +01:00
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import os, re, sys, types, inspect
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2005-03-09 04:07:26 +01:00
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2005-03-24 18:24:17 +01:00
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from m5 import panic, env
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2005-03-12 00:47:11 +01:00
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from convert import *
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2005-03-22 06:53:01 +01:00
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from multidict import multidict
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2005-03-09 04:07:26 +01:00
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2005-01-27 22:01:25 +01:00
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noDot = False
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try:
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2005-02-09 19:40:02 +01:00
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import pydot
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2005-01-27 22:01:25 +01:00
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except:
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2005-02-09 19:40:02 +01:00
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noDot = True
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2005-01-15 10:12:25 +01:00
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class Singleton(type):
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def __call__(cls, *args, **kwargs):
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if hasattr(cls, '_instance'):
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return cls._instance
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cls._instance = super(Singleton, cls).__call__(*args, **kwargs)
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return cls._instance
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#####################################################################
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#
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# M5 Python Configuration Utility
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#
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# The basic idea is to write simple Python programs that build Python
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# objects corresponding to M5 SimObjects for the deisred simulation
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# configuration. For now, the Python emits a .ini file that can be
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# parsed by M5. In the future, some tighter integration between M5
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# and the Python interpreter may allow bypassing the .ini file.
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#
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# Each SimObject class in M5 is represented by a Python class with the
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# same name. The Python inheritance tree mirrors the M5 C++ tree
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# (e.g., SimpleCPU derives from BaseCPU in both cases, and all
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# SimObjects inherit from a single SimObject base class). To specify
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# an instance of an M5 SimObject in a configuration, the user simply
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# instantiates the corresponding Python object. The parameters for
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# that SimObject are given by assigning to attributes of the Python
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# object, either using keyword assignment in the constructor or in
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# separate assignment statements. For example:
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#
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2005-03-23 19:25:48 +01:00
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# cache = BaseCache('my_cache', root, size='64KB')
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2005-01-15 10:12:25 +01:00
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# cache.hit_latency = 3
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# cache.assoc = 8
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#
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# (The first two constructor arguments specify the name of the created
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# cache and its parent node in the hierarchy.)
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#
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# The magic lies in the mapping of the Python attributes for SimObject
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# classes to the actual SimObject parameter specifications. This
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# allows parameter validity checking in the Python code. Continuing
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# the example above, the statements "cache.blurfl=3" or
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# "cache.assoc='hello'" would both result in runtime errors in Python,
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# since the BaseCache object has no 'blurfl' parameter and the 'assoc'
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# parameter requires an integer, respectively. This magic is done
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# primarily by overriding the special __setattr__ method that controls
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# assignment to object attributes.
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#
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# The Python module provides another class, ConfigNode, which is a
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# superclass of SimObject. ConfigNode implements the parent/child
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# relationship for building the configuration hierarchy tree.
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# Concrete instances of ConfigNode can be used to group objects in the
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# hierarchy, but do not correspond to SimObjects themselves (like a
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# .ini section with "children=" but no "type=".
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#
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# Once a set of Python objects have been instantiated in a hierarchy,
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# calling 'instantiate(obj)' (where obj is the root of the hierarchy)
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# will generate a .ini file. See simple-4cpu.py for an example
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# (corresponding to m5-test/simple-4cpu.ini).
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#
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#####################################################################
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#####################################################################
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#
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# ConfigNode/SimObject classes
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#
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# The Python class hierarchy rooted by ConfigNode (which is the base
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# class of SimObject, which in turn is the base class of all other M5
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# SimObject classes) has special attribute behavior. In general, an
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# object in this hierarchy has three categories of attribute-like
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# things:
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#
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# 1. Regular Python methods and variables. These must start with an
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# underscore to be treated normally.
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#
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# 2. SimObject parameters. These values are stored as normal Python
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# attributes, but all assignments to these attributes are checked
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# against the pre-defined set of parameters stored in the class's
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# _params dictionary. Assignments to attributes that do not
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# correspond to predefined parameters, or that are not of the correct
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# type, incur runtime errors.
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#
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# 3. Hierarchy children. The child nodes of a ConfigNode are stored
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# in the node's _children dictionary, but can be accessed using the
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# Python attribute dot-notation (just as they are printed out by the
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# simulator). Children cannot be created using attribute assigment;
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# they must be added by specifying the parent node in the child's
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# constructor or using the '+=' operator.
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# The SimObject parameters are the most complex, for a few reasons.
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# First, both parameter descriptions and parameter values are
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# inherited. Thus parameter description lookup must go up the
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# inheritance chain like normal attribute lookup, but this behavior
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# must be explicitly coded since the lookup occurs in each class's
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# _params attribute. Second, because parameter values can be set
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# on SimObject classes (to implement default values), the parameter
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# checking behavior must be enforced on class attribute assignments as
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# well as instance attribute assignments. Finally, because we allow
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# class specialization via inheritance (e.g., see the L1Cache class in
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# the simple-4cpu.py example), we must do parameter checking even on
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# class instantiation. To provide all these features, we use a
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# metaclass to define most of the SimObject parameter behavior for
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# this class hierarchy.
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#
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#####################################################################
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class Proxy(object):
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2005-03-16 06:40:48 +01:00
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def __init__(self, path):
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2005-01-15 10:12:25 +01:00
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self._object = None
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2005-03-16 06:40:48 +01:00
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if path == 'any':
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self._path = None
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else:
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# path is a list of (attr,index) tuples
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self._path = [(path,None)]
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self._index = None
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self._multiplier = None
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2005-01-15 10:12:25 +01:00
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def __getattr__(self, attr):
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2005-03-18 19:34:28 +01:00
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# python uses __bases__ internally for inheritance
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2005-03-16 06:40:48 +01:00
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if attr == '__bases__':
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return super(Proxy, self).__getattr__(self, attr)
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2005-03-18 19:34:28 +01:00
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if (self._path == None):
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panic("Can't add attributes to 'any' proxy")
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2005-03-16 06:40:48 +01:00
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self._path.append((attr,None))
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return self
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2005-01-15 10:12:25 +01:00
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def __setattr__(self, attr, value):
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if not attr.startswith('_'):
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raise AttributeError, 'cannot set attribute %s' % attr
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super(Proxy, self).__setattr__(attr, value)
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2005-03-16 06:40:48 +01:00
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# support indexing on proxies (e.g., parent.cpu[0])
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def __getitem__(self, key):
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if not isinstance(key, int):
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raise TypeError, "Proxy object requires integer index"
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if self._path == None:
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raise IndexError, "Index applied to 'any' proxy"
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# replace index portion of last path element with new index
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self._path[-1] = (self._path[-1][0], key)
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return self
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# support multiplying proxies by constants
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def __mul__(self, other):
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if not isinstance(other, int):
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raise TypeError, "Proxy multiplier must be integer"
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if self._multiplier == None:
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self._multiplier = other
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else:
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# support chained multipliers
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self._multiplier *= other
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return self
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def _mulcheck(self, result):
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if self._multiplier == None:
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return result
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if not isinstance(result, int):
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raise TypeError, "Proxy with multiplier resolves to " \
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"non-integer value"
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return result * self._multiplier
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def unproxy(self, base, ptype):
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obj = base
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done = False
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while not done:
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if obj is None:
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raise AttributeError, \
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'Parent of %s type %s not found at path %s' \
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% (base.name, ptype, self._path)
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2005-03-22 20:42:05 +01:00
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2005-03-17 05:10:17 +01:00
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result, done = obj.find(ptype, self._path)
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2005-03-16 06:40:48 +01:00
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obj = obj.parent
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2005-03-17 05:10:17 +01:00
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if isinstance(result, Proxy):
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result = result.unproxy(obj, ptype)
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return self._mulcheck(result)
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2005-03-16 06:40:48 +01:00
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def getindex(obj, index):
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if index == None:
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return obj
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try:
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obj = obj[index]
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except TypeError:
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if index != 0:
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raise
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# if index is 0 and item is not subscriptable, just
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# use item itself (so cpu[0] works on uniprocessors)
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2005-01-15 10:12:25 +01:00
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return obj
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2005-03-16 06:40:48 +01:00
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getindex = staticmethod(getindex)
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class ProxyFactory(object):
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def __getattr__(self, attr):
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return Proxy(attr)
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2005-01-15 10:12:25 +01:00
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2005-03-16 06:40:48 +01:00
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# global object for handling parent.foo proxies
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parent = ProxyFactory()
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2005-01-15 10:12:25 +01:00
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def isSubClass(value, cls):
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try:
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return issubclass(value, cls)
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except:
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return False
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def isConfigNode(value):
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try:
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return issubclass(value, ConfigNode)
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except:
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return False
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def isSimObject(value):
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try:
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return issubclass(value, SimObject)
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except:
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return False
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def isSimObjSequence(value):
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2005-03-15 19:22:47 +01:00
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if not isinstance(value, (list, tuple)):
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2005-01-15 10:12:25 +01:00
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return False
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for val in value:
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if not isNullPointer(val) and not isConfigNode(val):
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return False
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return True
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2005-01-21 10:34:01 +01:00
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def isParamContext(value):
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try:
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return issubclass(value, ParamContext)
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except:
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return False
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2005-03-08 02:56:02 +01:00
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class_decorator = 'M5M5_SIMOBJECT_'
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expr_decorator = 'M5M5_EXPRESSION_'
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2005-02-03 03:13:01 +01:00
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dot_decorator = '_M5M5_DOT_'
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2005-03-13 06:54:34 +01:00
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# 'Global' map of legitimate types for SimObject parameters.
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2005-03-13 06:36:06 +01:00
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param_types = {}
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2005-03-13 06:54:34 +01:00
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# Dummy base class to identify types that are legitimate for SimObject
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# parameters.
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2005-03-13 06:36:06 +01:00
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class ParamType(object):
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pass
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2005-03-13 06:54:34 +01:00
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# Add types defined in given context (dict or module) that are derived
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# from ParamType to param_types map.
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2005-03-13 06:36:06 +01:00
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def add_param_types(ctx):
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if isinstance(ctx, types.DictType):
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source_dict = ctx
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elif isinstance(ctx, types.ModuleType):
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source_dict = ctx.__dict__
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else:
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raise TypeError, \
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"m5.config.add_param_types requires dict or module as arg"
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for key,val in source_dict.iteritems():
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if isinstance(val, type) and issubclass(val, ParamType):
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param_types[key] = val
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2005-01-15 10:12:25 +01:00
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# The metaclass for ConfigNode (and thus for everything that derives
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# from ConfigNode, including SimObject). This class controls how new
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# classes that derive from ConfigNode are instantiated, and provides
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# inherited class behavior (just like a class controls how instances
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# of that class are instantiated, and provides inherited instance
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# behavior).
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class MetaConfigNode(type):
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2005-03-08 02:56:02 +01:00
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# Attributes that can be set only at initialization time
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init_keywords = {}
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# Attributes that can be set any time
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keywords = { 'check' : types.FunctionType,
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'children' : types.ListType }
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2005-01-15 10:12:25 +01:00
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# __new__ is called before __init__, and is where the statements
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# in the body of the class definition get loaded into the class's
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# __dict__. We intercept this to filter out parameter assignments
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# and only allow "private" attributes to be passed to the base
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# __new__ (starting with underscore).
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def __new__(mcls, name, bases, dict):
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2005-03-08 02:56:02 +01:00
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# Copy "private" attributes (including special methods such as __new__)
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# to the official dict. Everything else goes in _init_dict to be
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# filtered in __init__.
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cls_dict = {}
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2005-01-15 10:12:25 +01:00
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for key,val in dict.items():
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2005-03-08 02:56:02 +01:00
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if key.startswith('_'):
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cls_dict[key] = val
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del dict[key]
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cls_dict['_init_dict'] = dict
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return super(MetaConfigNode, mcls).__new__(mcls, name, bases, cls_dict)
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2005-02-03 03:13:01 +01:00
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2005-03-08 02:56:02 +01:00
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# initialization
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def __init__(cls, name, bases, dict):
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super(MetaConfigNode, cls).__init__(name, bases, dict)
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2005-02-03 03:13:01 +01:00
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2005-03-08 02:56:02 +01:00
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# initialize required attributes
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2005-03-22 06:53:01 +01:00
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cls._params = multidict()
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cls._values = multidict()
|
2005-03-13 06:36:06 +01:00
|
|
|
cls._param_types = {}
|
2005-03-08 02:56:02 +01:00
|
|
|
cls._bases = [c for c in cls.__mro__ if isConfigNode(c)]
|
|
|
|
cls._anon_subclass_counter = 0
|
|
|
|
|
2005-03-22 06:53:01 +01:00
|
|
|
# We don't support multiple inheritence. If you want to, you
|
|
|
|
# must fix multidict to deal with it properly.
|
2005-03-22 20:47:18 +01:00
|
|
|
cnbase = [ base for base in bases if isConfigNode(base) ]
|
|
|
|
if len(cnbase) == 1:
|
2005-03-22 06:53:01 +01:00
|
|
|
# If your parent has a value in it that's a config node, clone
|
|
|
|
# it. Do this now so if we update any of the values'
|
|
|
|
# attributes we are updating the clone and not the original.
|
2005-03-22 20:47:18 +01:00
|
|
|
for key,val in cnbase[0]._values.iteritems():
|
2005-03-08 02:56:02 +01:00
|
|
|
|
|
|
|
# don't clone if (1) we're about to overwrite it with
|
|
|
|
# a local setting or (2) we've already cloned a copy
|
|
|
|
# from an earlier (more derived) base
|
|
|
|
if cls._init_dict.has_key(key) or cls._values.has_key(key):
|
|
|
|
continue
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
if isConfigNode(val):
|
|
|
|
cls._values[key] = val()
|
2005-03-22 06:53:01 +01:00
|
|
|
elif isSimObjSequence(val) and len(val):
|
2005-03-08 02:56:02 +01:00
|
|
|
cls._values[key] = [ v() for v in val ]
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-22 20:47:18 +01:00
|
|
|
cls._params.parent = cnbase[0]._params
|
|
|
|
cls._values.parent = cnbase[0]._values
|
2005-03-22 06:53:01 +01:00
|
|
|
|
2005-03-22 20:47:18 +01:00
|
|
|
elif len(cnbase) > 1:
|
2005-03-22 06:53:01 +01:00
|
|
|
panic("""\
|
|
|
|
The config hierarchy only supports single inheritence of SimObject
|
|
|
|
classes. You're trying to derive from:
|
2005-03-22 20:47:18 +01:00
|
|
|
%s""" % str(cnbase))
|
2005-03-22 06:53:01 +01:00
|
|
|
|
|
|
|
# process param types from _init_dict, as these may be needed
|
2005-03-13 06:36:06 +01:00
|
|
|
# by param descriptions also in _init_dict
|
2005-03-08 02:56:02 +01:00
|
|
|
for key,val in cls._init_dict.items():
|
2005-03-13 06:36:06 +01:00
|
|
|
if isinstance(val, type) and issubclass(val, ParamType):
|
|
|
|
cls._param_types[key] = val
|
|
|
|
if not issubclass(val, ConfigNode):
|
|
|
|
del cls._init_dict[key]
|
|
|
|
|
|
|
|
# now process remaining _init_dict items
|
|
|
|
for key,val in cls._init_dict.items():
|
|
|
|
# param descriptions
|
2005-03-23 19:25:48 +01:00
|
|
|
if isinstance(val, ParamBase):
|
2005-03-22 06:53:01 +01:00
|
|
|
cls._new_param(key, val)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
# init-time-only keywords
|
|
|
|
elif cls.init_keywords.has_key(key):
|
|
|
|
cls._set_keyword(key, val, cls.init_keywords[key])
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
# See description of decorators in the importer.py file.
|
|
|
|
# We just strip off the expr_decorator now since we don't
|
|
|
|
# need from this point on.
|
|
|
|
elif key.startswith(expr_decorator):
|
|
|
|
key = key[len(expr_decorator):]
|
|
|
|
# because it had dots into a list so that we can find the
|
|
|
|
# proper variable to modify.
|
|
|
|
key = key.split(dot_decorator)
|
|
|
|
c = cls
|
|
|
|
for item in key[:-1]:
|
|
|
|
c = getattr(c, item)
|
|
|
|
setattr(c, key[-1], val)
|
|
|
|
|
|
|
|
# default: use normal path (ends up in __setattr__)
|
2005-02-03 03:13:01 +01:00
|
|
|
else:
|
2005-03-08 02:56:02 +01:00
|
|
|
setattr(cls, key, val)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
def _set_keyword(cls, keyword, val, kwtype):
|
|
|
|
if not isinstance(val, kwtype):
|
|
|
|
raise TypeError, 'keyword %s has bad type %s (expecting %s)' % \
|
|
|
|
(keyword, type(val), kwtype)
|
|
|
|
if isinstance(val, types.FunctionType):
|
|
|
|
val = classmethod(val)
|
|
|
|
type.__setattr__(cls, keyword, val)
|
|
|
|
|
2005-03-22 06:53:01 +01:00
|
|
|
def _new_param(cls, name, value):
|
|
|
|
cls._params[name] = value
|
|
|
|
if hasattr(value, 'default'):
|
|
|
|
cls._values[name] = value.default
|
|
|
|
# try to resolve local param types in local param_types scope
|
|
|
|
value.maybe_resolve_type(cls._param_types)
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
# Set attribute (called on foo.attr = value when foo is an
|
|
|
|
# instance of class cls).
|
|
|
|
def __setattr__(cls, attr, value):
|
|
|
|
# normal processing for private attributes
|
|
|
|
if attr.startswith('_'):
|
|
|
|
type.__setattr__(cls, attr, value)
|
|
|
|
return
|
|
|
|
|
|
|
|
if cls.keywords.has_key(attr):
|
2005-03-08 02:56:02 +01:00
|
|
|
cls._set_keyword(attr, value, cls.keywords[attr])
|
2005-01-15 10:12:25 +01:00
|
|
|
return
|
|
|
|
|
|
|
|
# must be SimObject param
|
2005-03-22 06:53:01 +01:00
|
|
|
param = cls._params.get(attr, None)
|
2005-01-15 10:12:25 +01:00
|
|
|
if param:
|
|
|
|
# It's ok: set attribute by delegating to 'object' class.
|
|
|
|
# Note the use of param.make_value() to verify/canonicalize
|
|
|
|
# the assigned value
|
2005-03-13 06:36:06 +01:00
|
|
|
try:
|
|
|
|
param.valid(value)
|
2005-03-22 06:53:01 +01:00
|
|
|
except Exception, e:
|
2005-03-26 04:32:00 +01:00
|
|
|
msg = "%s\nError setting param %s.%s to %s\n" % \
|
2005-03-23 19:25:48 +01:00
|
|
|
(e, cls.__name__, attr, value)
|
2005-03-26 04:32:00 +01:00
|
|
|
e.args = (msg, )
|
|
|
|
raise
|
2005-03-22 06:53:01 +01:00
|
|
|
cls._values[attr] = value
|
2005-01-15 10:12:25 +01:00
|
|
|
elif isConfigNode(value) or isSimObjSequence(value):
|
2005-03-22 06:53:01 +01:00
|
|
|
cls._values[attr] = value
|
2005-01-15 10:12:25 +01:00
|
|
|
else:
|
|
|
|
raise AttributeError, \
|
|
|
|
"Class %s has no parameter %s" % (cls.__name__, attr)
|
|
|
|
|
2005-03-22 06:53:01 +01:00
|
|
|
def __getattr__(cls, attr):
|
|
|
|
if cls._params.has_key(attr) or cls._values.has_key(attr):
|
|
|
|
return Value(cls, attr)
|
|
|
|
|
|
|
|
if attr == '_cpp_param_decl' and hasattr(cls, 'type'):
|
|
|
|
return cls.type + '*'
|
|
|
|
|
|
|
|
raise AttributeError, \
|
|
|
|
"object '%s' has no attribute '%s'" % (cls.__name__, attr)
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
def add_child(cls, instance, name, child):
|
|
|
|
if isNullPointer(child) or instance.top_child_names.has_key(name):
|
|
|
|
return
|
|
|
|
|
2005-03-15 19:22:47 +01:00
|
|
|
if isinstance(child, (list, tuple)):
|
2005-01-15 10:12:25 +01:00
|
|
|
kid = []
|
|
|
|
for i,c in enumerate(child):
|
|
|
|
n = '%s%d' % (name, i)
|
|
|
|
k = c.instantiate(n, instance)
|
|
|
|
|
|
|
|
instance.children.append(k)
|
|
|
|
instance.child_names[n] = k
|
|
|
|
instance.child_objects[c] = k
|
|
|
|
kid.append(k)
|
|
|
|
else:
|
|
|
|
kid = child.instantiate(name, instance)
|
|
|
|
instance.children.append(kid)
|
|
|
|
instance.child_names[name] = kid
|
|
|
|
instance.child_objects[child] = kid
|
|
|
|
|
|
|
|
instance.top_child_names[name] = kid
|
|
|
|
|
|
|
|
# Print instance info to .ini file.
|
|
|
|
def instantiate(cls, name, parent = None):
|
2005-03-12 00:30:44 +01:00
|
|
|
instance = Node(name, cls, parent, isParamContext(cls))
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
if hasattr(cls, 'check'):
|
|
|
|
cls.check()
|
|
|
|
|
2005-03-22 06:53:01 +01:00
|
|
|
for key,value in cls._values.iteritems():
|
2005-01-15 10:12:25 +01:00
|
|
|
if isConfigNode(value):
|
|
|
|
cls.add_child(instance, key, value)
|
2005-03-15 19:22:47 +01:00
|
|
|
if isinstance(value, (list, tuple)):
|
|
|
|
vals = [ v for v in value if isConfigNode(v) ]
|
|
|
|
if len(vals):
|
|
|
|
cls.add_child(instance, key, vals)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-22 06:53:01 +01:00
|
|
|
for pname,param in cls._params.iteritems():
|
|
|
|
value = cls._values.get(pname, None)
|
|
|
|
if value is None:
|
|
|
|
panic('Error getting %s from %s' % (pname, name))
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-09 20:42:30 +01:00
|
|
|
try:
|
2005-01-15 10:12:25 +01:00
|
|
|
if isConfigNode(value):
|
|
|
|
value = instance.child_objects[value]
|
2005-03-15 19:22:47 +01:00
|
|
|
elif isinstance(value, (list, tuple)):
|
2005-01-15 10:12:25 +01:00
|
|
|
v = []
|
|
|
|
for val in value:
|
|
|
|
if isConfigNode(val):
|
|
|
|
v.append(instance.child_objects[val])
|
|
|
|
else:
|
|
|
|
v.append(val)
|
|
|
|
value = v
|
|
|
|
|
|
|
|
p = NodeParam(pname, param, value)
|
|
|
|
instance.params.append(p)
|
|
|
|
instance.param_names[pname] = p
|
2005-03-22 20:42:05 +01:00
|
|
|
except Exception, e:
|
2005-03-26 04:32:00 +01:00
|
|
|
msg = 'Exception while evaluating %s.%s\n%s' % \
|
2005-03-22 20:42:05 +01:00
|
|
|
(instance.path, pname, e)
|
2005-03-26 04:32:00 +01:00
|
|
|
e.args = (msg, )
|
|
|
|
raise
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
return instance
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
realvalue = value
|
|
|
|
if isinstance(value, Node):
|
|
|
|
realvalue = value.realtype
|
|
|
|
|
|
|
|
if isinstance(realvalue, Proxy):
|
|
|
|
return value
|
|
|
|
|
|
|
|
if realvalue == None or isNullPointer(realvalue):
|
|
|
|
return value
|
|
|
|
|
|
|
|
if isSubClass(realvalue, cls):
|
|
|
|
return value
|
|
|
|
|
|
|
|
raise TypeError, 'object %s type %s wrong type, should be %s' % \
|
|
|
|
(repr(realvalue), realvalue, cls)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
|
|
|
if isNullPointer(value):
|
|
|
|
return 'Null'
|
|
|
|
return Node._string(value)
|
|
|
|
|
|
|
|
# The ConfigNode class is the root of the special hierarchy. Most of
|
|
|
|
# the code in this class deals with the configuration hierarchy itself
|
|
|
|
# (parent/child node relationships).
|
|
|
|
class ConfigNode(object):
|
|
|
|
# Specify metaclass. Any class inheriting from ConfigNode will
|
|
|
|
# get this metaclass.
|
|
|
|
__metaclass__ = MetaConfigNode
|
|
|
|
|
|
|
|
def __new__(cls, **kwargs):
|
2005-03-08 02:56:02 +01:00
|
|
|
name = cls.__name__ + ("_%d" % cls._anon_subclass_counter)
|
|
|
|
cls._anon_subclass_counter += 1
|
|
|
|
return cls.__metaclass__(name, (cls, ), kwargs)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-22 06:53:01 +01:00
|
|
|
class ParamContext(ConfigNode,ParamType):
|
2005-01-21 10:34:01 +01:00
|
|
|
pass
|
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
class MetaSimObject(MetaConfigNode):
|
|
|
|
# init_keywords and keywords are inherited from MetaConfigNode,
|
|
|
|
# with overrides/additions
|
|
|
|
init_keywords = MetaConfigNode.init_keywords
|
|
|
|
init_keywords.update({ 'abstract' : types.BooleanType,
|
|
|
|
'type' : types.StringType })
|
|
|
|
|
|
|
|
keywords = MetaConfigNode.keywords
|
|
|
|
# no additional keywords
|
|
|
|
|
|
|
|
cpp_classes = []
|
|
|
|
|
|
|
|
# initialization
|
|
|
|
def __init__(cls, name, bases, dict):
|
|
|
|
super(MetaSimObject, cls).__init__(name, bases, dict)
|
|
|
|
|
|
|
|
if hasattr(cls, 'type'):
|
|
|
|
if name == 'SimObject':
|
|
|
|
cls._cpp_base = None
|
|
|
|
elif hasattr(cls._bases[1], 'type'):
|
|
|
|
cls._cpp_base = cls._bases[1].type
|
|
|
|
else:
|
|
|
|
panic("SimObject %s derives from a non-C++ SimObject %s "\
|
|
|
|
"(no 'type')" % (cls, cls_bases[1].__name__))
|
|
|
|
|
|
|
|
# This class corresponds to a C++ class: put it on the global
|
|
|
|
# list of C++ objects to generate param structs, etc.
|
|
|
|
MetaSimObject.cpp_classes.append(cls)
|
|
|
|
|
|
|
|
def _cpp_decl(cls):
|
2005-01-15 10:12:25 +01:00
|
|
|
name = cls.__name__
|
2005-03-08 02:56:02 +01:00
|
|
|
code = ""
|
2005-03-13 06:36:06 +01:00
|
|
|
code += "\n".join([e.cpp_declare() for e in cls._param_types.values()])
|
2005-03-08 02:56:02 +01:00
|
|
|
code += "\n"
|
2005-01-15 10:12:25 +01:00
|
|
|
param_names = cls._params.keys()
|
|
|
|
param_names.sort()
|
2005-03-08 02:56:02 +01:00
|
|
|
code += "struct Params"
|
|
|
|
if cls._cpp_base:
|
|
|
|
code += " : public %s::Params" % cls._cpp_base
|
|
|
|
code += " {\n "
|
|
|
|
code += "\n ".join([cls._params[pname].cpp_decl(pname) \
|
|
|
|
for pname in param_names])
|
|
|
|
code += "\n};\n"
|
2005-01-15 10:12:25 +01:00
|
|
|
return code
|
|
|
|
|
|
|
|
class NodeParam(object):
|
|
|
|
def __init__(self, name, param, value):
|
|
|
|
self.name = name
|
|
|
|
self.param = param
|
|
|
|
self.ptype = param.ptype
|
|
|
|
self.convert = param.convert
|
|
|
|
self.string = param.string
|
|
|
|
self.value = value
|
|
|
|
|
|
|
|
class Node(object):
|
|
|
|
all = {}
|
2005-03-12 00:30:44 +01:00
|
|
|
def __init__(self, name, realtype, parent, paramcontext):
|
2005-01-15 10:12:25 +01:00
|
|
|
self.name = name
|
|
|
|
self.realtype = realtype
|
2005-03-12 00:30:44 +01:00
|
|
|
if isSimObject(realtype):
|
|
|
|
self.type = realtype.type
|
|
|
|
else:
|
|
|
|
self.type = None
|
2005-01-15 10:12:25 +01:00
|
|
|
self.parent = parent
|
|
|
|
self.children = []
|
|
|
|
self.child_names = {}
|
|
|
|
self.child_objects = {}
|
|
|
|
self.top_child_names = {}
|
|
|
|
self.params = []
|
|
|
|
self.param_names = {}
|
2005-01-21 10:34:01 +01:00
|
|
|
self.paramcontext = paramcontext
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
path = [ self.name ]
|
|
|
|
node = self.parent
|
|
|
|
while node is not None:
|
|
|
|
if node.name != 'root':
|
|
|
|
path.insert(0, node.name)
|
|
|
|
else:
|
|
|
|
assert(node.parent is None)
|
|
|
|
node = node.parent
|
|
|
|
self.path = '.'.join(path)
|
|
|
|
|
|
|
|
def find(self, realtype, path):
|
|
|
|
if not path:
|
2005-02-23 05:53:34 +01:00
|
|
|
if issubclass(self.realtype, realtype):
|
2005-01-15 10:12:25 +01:00
|
|
|
return self, True
|
|
|
|
|
|
|
|
obj = None
|
|
|
|
for child in self.children:
|
2005-02-23 05:53:34 +01:00
|
|
|
if issubclass(child.realtype, realtype):
|
2005-01-15 10:12:25 +01:00
|
|
|
if obj is not None:
|
|
|
|
raise AttributeError, \
|
2005-03-16 06:40:48 +01:00
|
|
|
'parent.any matched more than one: %s %s' % \
|
2005-01-15 10:12:25 +01:00
|
|
|
(obj.path, child.path)
|
|
|
|
obj = child
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
for param in self.params:
|
|
|
|
if isConfigNode(param.ptype):
|
|
|
|
continue
|
|
|
|
if issubclass(param.ptype, realtype):
|
|
|
|
if obj is not None:
|
|
|
|
raise AttributeError, \
|
|
|
|
'parent.any matched more than one: %s' % obj.path
|
|
|
|
obj = param.value
|
2005-01-15 10:12:25 +01:00
|
|
|
return obj, obj is not None
|
|
|
|
|
|
|
|
try:
|
|
|
|
obj = self
|
2005-03-16 06:40:48 +01:00
|
|
|
for (node,index) in path[:-1]:
|
|
|
|
if obj.child_names.has_key(node):
|
|
|
|
obj = obj.child_names[node]
|
|
|
|
else:
|
|
|
|
obj = obj.top_child_names[node]
|
|
|
|
obj = Proxy.getindex(obj, index)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-16 06:40:48 +01:00
|
|
|
(last,index) = path[-1]
|
2005-01-15 10:12:25 +01:00
|
|
|
if obj.child_names.has_key(last):
|
|
|
|
value = obj.child_names[last]
|
2005-03-16 06:40:48 +01:00
|
|
|
return Proxy.getindex(value, index), True
|
|
|
|
elif obj.top_child_names.has_key(last):
|
|
|
|
value = obj.top_child_names[last]
|
|
|
|
return Proxy.getindex(value, index), True
|
2005-01-15 10:12:25 +01:00
|
|
|
elif obj.param_names.has_key(last):
|
|
|
|
value = obj.param_names[last]
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
#realtype._convert(value.value)
|
2005-03-16 06:40:48 +01:00
|
|
|
return Proxy.getindex(value.value, index), True
|
2005-01-15 10:12:25 +01:00
|
|
|
except KeyError:
|
|
|
|
pass
|
|
|
|
|
|
|
|
return None, False
|
|
|
|
|
2005-03-16 06:40:48 +01:00
|
|
|
def unproxy(self, param, ptype):
|
|
|
|
if not isinstance(param, Proxy):
|
|
|
|
return param
|
|
|
|
return param.unproxy(self, ptype)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def fixup(self):
|
|
|
|
self.all[self.path] = self
|
|
|
|
|
|
|
|
for param in self.params:
|
|
|
|
ptype = param.ptype
|
|
|
|
pval = param.value
|
|
|
|
|
|
|
|
try:
|
2005-03-15 19:22:47 +01:00
|
|
|
if isinstance(pval, (list, tuple)):
|
2005-03-16 06:40:48 +01:00
|
|
|
param.value = [ self.unproxy(pv, ptype) for pv in pval ]
|
2005-01-15 10:12:25 +01:00
|
|
|
else:
|
2005-03-16 06:40:48 +01:00
|
|
|
param.value = self.unproxy(pval, ptype)
|
2005-03-22 20:42:05 +01:00
|
|
|
except Exception, e:
|
2005-03-26 04:32:00 +01:00
|
|
|
msg = 'Error while fixing up %s:%s\n%s' % \
|
2005-03-22 20:42:05 +01:00
|
|
|
(self.path, param.name, e)
|
2005-03-26 04:32:00 +01:00
|
|
|
e.args = (msg, )
|
|
|
|
raise
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
for child in self.children:
|
|
|
|
assert(child != self)
|
|
|
|
child.fixup()
|
|
|
|
|
|
|
|
# print type and parameter values to .ini file
|
|
|
|
def display(self):
|
|
|
|
print '[' + self.path + ']' # .ini section header
|
|
|
|
|
|
|
|
if isSimObject(self.realtype):
|
|
|
|
print 'type = %s' % self.type
|
|
|
|
|
|
|
|
if self.children:
|
|
|
|
# instantiate children in same order they were added for
|
|
|
|
# backward compatibility (else we can end up with cpu1
|
2005-03-09 06:17:09 +01:00
|
|
|
# before cpu0). Changing ordering can also influence timing
|
|
|
|
# in the current memory system, as caches get added to a bus
|
|
|
|
# in different orders which affects their priority in the
|
2005-03-22 06:08:54 +01:00
|
|
|
# case of simulataneous requests.
|
|
|
|
self.children.sort(lambda x,y: cmp(x.name, y.name))
|
2005-01-21 10:34:01 +01:00
|
|
|
children = [ c.name for c in self.children if not c.paramcontext]
|
|
|
|
print 'children =', ' '.join(children)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-06 01:28:43 +01:00
|
|
|
self.params.sort(lambda x,y: cmp(x.name, y.name))
|
2005-01-15 10:12:25 +01:00
|
|
|
for param in self.params:
|
|
|
|
try:
|
|
|
|
if param.value is None:
|
|
|
|
raise AttributeError, 'Parameter with no value'
|
|
|
|
|
|
|
|
value = param.convert(param.value)
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
if hasattr(value, 'relative') and value.relative and value:
|
|
|
|
if param.name == 'cycle_time':
|
|
|
|
start = self.parent
|
|
|
|
else:
|
|
|
|
start = self
|
|
|
|
val = start.unproxy(parent.cycle_time,
|
|
|
|
(Frequency, Latency, ClockPeriod))
|
|
|
|
value.clock = Frequency._convert(val)
|
2005-01-15 10:12:25 +01:00
|
|
|
string = param.string(value)
|
2005-03-22 20:42:05 +01:00
|
|
|
except Exception, e:
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
msg = 'exception in %s:%s=%s\n%s' % (self.path, param.name,
|
|
|
|
value, e)
|
2005-03-26 04:32:00 +01:00
|
|
|
e.args = (msg, )
|
|
|
|
raise
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
print '%s = %s' % (param.name, string)
|
|
|
|
|
|
|
|
print
|
|
|
|
|
|
|
|
# recursively dump out children
|
|
|
|
for c in self.children:
|
|
|
|
c.display()
|
|
|
|
|
2005-01-27 22:01:25 +01:00
|
|
|
# print type and parameter values to .ini file
|
|
|
|
def outputDot(self, dot):
|
|
|
|
label = "{%s|" % self.path
|
|
|
|
if isSimObject(self.realtype):
|
|
|
|
label += '%s|' % self.type
|
|
|
|
|
|
|
|
if self.children:
|
|
|
|
# instantiate children in same order they were added for
|
|
|
|
# backward compatibility (else we can end up with cpu1
|
|
|
|
# before cpu0).
|
|
|
|
for c in self.children:
|
|
|
|
dot.add_edge(pydot.Edge(self.path,c.path, style="bold"))
|
|
|
|
|
|
|
|
simobjs = []
|
|
|
|
for param in self.params:
|
|
|
|
try:
|
|
|
|
if param.value is None:
|
|
|
|
raise AttributeError, 'Parameter with no value'
|
|
|
|
|
|
|
|
value = param.convert(param.value)
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
if param.ptype in (Frequency, Latency, ClockPeriod):
|
|
|
|
val = self.parent.unproxy(parent.frequency, Frequency)
|
|
|
|
param.clock = Frequency._convert(val)
|
2005-01-27 22:01:25 +01:00
|
|
|
string = param.string(value)
|
2005-03-22 20:42:05 +01:00
|
|
|
except Exception, e:
|
2005-03-26 04:32:00 +01:00
|
|
|
msg = 'exception in %s:%s\n%s' % (self.name, param.name, e)
|
|
|
|
e.args = (msg, )
|
2005-01-27 22:01:25 +01:00
|
|
|
raise
|
2005-03-26 04:32:00 +01:00
|
|
|
|
2005-02-23 05:53:34 +01:00
|
|
|
if isConfigNode(param.ptype) and string != "Null":
|
2005-01-27 22:01:25 +01:00
|
|
|
simobjs.append(string)
|
|
|
|
else:
|
|
|
|
label += '%s = %s\\n' % (param.name, string)
|
|
|
|
|
|
|
|
for so in simobjs:
|
|
|
|
label += "|<%s> %s" % (so, so)
|
2005-03-22 20:42:05 +01:00
|
|
|
dot.add_edge(pydot.Edge("%s:%s" % (self.path, so), so,
|
|
|
|
tailport="w"))
|
2005-01-27 22:01:25 +01:00
|
|
|
label += '}'
|
|
|
|
dot.add_node(pydot.Node(self.path,shape="Mrecord",label=label))
|
|
|
|
|
|
|
|
# recursively dump out children
|
|
|
|
for c in self.children:
|
|
|
|
c.outputDot(dot)
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
def _string(cls, value):
|
|
|
|
if not isinstance(value, Node):
|
|
|
|
raise AttributeError, 'expecting %s got %s' % (Node, value)
|
|
|
|
return value.path
|
|
|
|
_string = classmethod(_string)
|
|
|
|
|
|
|
|
#####################################################################
|
|
|
|
#
|
|
|
|
# Parameter description classes
|
|
|
|
#
|
|
|
|
# The _params dictionary in each class maps parameter names to
|
|
|
|
# either a Param or a VectorParam object. These objects contain the
|
|
|
|
# parameter description string, the parameter type, and the default
|
|
|
|
# value (loaded from the PARAM section of the .odesc files). The
|
|
|
|
# _convert() method on these objects is used to force whatever value
|
|
|
|
# is assigned to the parameter to the appropriate type.
|
|
|
|
#
|
|
|
|
# Note that the default values are loaded into the class's attribute
|
|
|
|
# space when the parameter dictionary is initialized (in
|
|
|
|
# MetaConfigNode._setparams()); after that point they aren't used.
|
|
|
|
#
|
|
|
|
#####################################################################
|
|
|
|
|
|
|
|
def isNullPointer(value):
|
|
|
|
return isinstance(value, NullSimObject)
|
|
|
|
|
|
|
|
class Value(object):
|
|
|
|
def __init__(self, obj, attr):
|
|
|
|
super(Value, self).__setattr__('attr', attr)
|
|
|
|
super(Value, self).__setattr__('obj', obj)
|
|
|
|
|
|
|
|
def _getattr(self):
|
2005-03-22 06:53:01 +01:00
|
|
|
return self.obj._values.get(self.attr)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def __setattr__(self, attr, value):
|
2005-03-09 20:42:30 +01:00
|
|
|
setattr(self._getattr(), attr, value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def __getattr__(self, attr):
|
2005-03-09 20:42:30 +01:00
|
|
|
return getattr(self._getattr(), attr)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def __getitem__(self, index):
|
|
|
|
return self._getattr().__getitem__(index)
|
|
|
|
|
|
|
|
def __call__(self, *args, **kwargs):
|
|
|
|
return self._getattr().__call__(*args, **kwargs)
|
|
|
|
|
|
|
|
def __nonzero__(self):
|
|
|
|
return bool(self._getattr())
|
|
|
|
|
|
|
|
def __str__(self):
|
|
|
|
return str(self._getattr())
|
|
|
|
|
2005-03-17 20:31:08 +01:00
|
|
|
def __len__(self):
|
|
|
|
return len(self._getattr())
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
# Regular parameter.
|
2005-03-23 19:25:48 +01:00
|
|
|
class ParamBase(object):
|
2005-03-08 02:56:02 +01:00
|
|
|
def __init__(self, ptype, *args, **kwargs):
|
|
|
|
if isinstance(ptype, types.StringType):
|
|
|
|
self.ptype_string = ptype
|
|
|
|
elif isinstance(ptype, type):
|
|
|
|
self.ptype = ptype
|
|
|
|
else:
|
|
|
|
raise TypeError, "Param type is not a type (%s)" % ptype
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
if args:
|
|
|
|
if len(args) == 1:
|
|
|
|
self.desc = args[0]
|
|
|
|
elif len(args) == 2:
|
|
|
|
self.default = args[0]
|
|
|
|
self.desc = args[1]
|
|
|
|
else:
|
|
|
|
raise TypeError, 'too many arguments'
|
|
|
|
|
|
|
|
if kwargs.has_key('desc'):
|
|
|
|
assert(not hasattr(self, 'desc'))
|
|
|
|
self.desc = kwargs['desc']
|
|
|
|
del kwargs['desc']
|
|
|
|
|
|
|
|
if kwargs.has_key('default'):
|
|
|
|
assert(not hasattr(self, 'default'))
|
|
|
|
self.default = kwargs['default']
|
|
|
|
del kwargs['default']
|
|
|
|
|
|
|
|
if kwargs:
|
|
|
|
raise TypeError, 'extra unknown kwargs %s' % kwargs
|
|
|
|
|
|
|
|
if not hasattr(self, 'desc'):
|
|
|
|
raise TypeError, 'desc attribute missing'
|
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
def maybe_resolve_type(self, context):
|
|
|
|
# check if already resolved... don't use hasattr(),
|
|
|
|
# as that calls __getattr__()
|
|
|
|
if self.__dict__.has_key('ptype'):
|
|
|
|
return
|
|
|
|
try:
|
|
|
|
self.ptype = context[self.ptype_string]
|
|
|
|
except KeyError:
|
|
|
|
# no harm in trying... we'll try again later using global scope
|
|
|
|
pass
|
|
|
|
|
2005-02-23 05:53:34 +01:00
|
|
|
def __getattr__(self, attr):
|
|
|
|
if attr == 'ptype':
|
|
|
|
try:
|
2005-03-13 06:36:06 +01:00
|
|
|
self.ptype = param_types[self.ptype_string]
|
2005-02-23 05:53:34 +01:00
|
|
|
return self.ptype
|
|
|
|
except:
|
2005-03-13 06:36:06 +01:00
|
|
|
panic("undefined Param type %s" % self.ptype_string)
|
2005-02-23 05:53:34 +01:00
|
|
|
else:
|
|
|
|
raise AttributeError, "'%s' object has no attribute '%s'" % \
|
|
|
|
(type(self).__name__, attr)
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
def valid(self, value):
|
|
|
|
if not isinstance(value, Proxy):
|
2005-02-23 05:53:34 +01:00
|
|
|
self.ptype._convert(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def convert(self, value):
|
2005-02-23 05:53:34 +01:00
|
|
|
return self.ptype._convert(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def string(self, value):
|
2005-02-23 05:53:34 +01:00
|
|
|
return self.ptype._string(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def set(self, name, instance, value):
|
|
|
|
instance.__dict__[name] = value
|
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
def cpp_decl(self, name):
|
|
|
|
return '%s %s;' % (self.ptype._cpp_param_decl, name)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
class ParamFactory(object):
|
2005-01-15 10:12:25 +01:00
|
|
|
def __init__(self, type):
|
|
|
|
self.ptype = type
|
|
|
|
|
|
|
|
# E.g., Param.Int(5, "number of widgets")
|
|
|
|
def __call__(self, *args, **kwargs):
|
2005-03-23 19:25:48 +01:00
|
|
|
return ParamBase(self.ptype, *args, **kwargs)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
# Strange magic to theoretically allow dotted names as Param classes,
|
|
|
|
# e.g., Param.Foo.Bar(...) to have a param of type Foo.Bar
|
2005-01-15 10:12:25 +01:00
|
|
|
def __getattr__(self, attr):
|
|
|
|
if attr == '__bases__':
|
|
|
|
raise AttributeError, ''
|
|
|
|
cls = type(self)
|
|
|
|
return cls(attr)
|
|
|
|
|
|
|
|
def __setattr__(self, attr, value):
|
|
|
|
if attr != 'ptype':
|
|
|
|
raise AttributeError, \
|
|
|
|
'Attribute %s not available in %s' % (attr, self.__class__)
|
2005-03-23 19:25:48 +01:00
|
|
|
super(ParamFactory, self).__setattr__(attr, value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
Param = ParamFactory(None)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
# Vector-valued parameter description. Just like Param, except that
|
|
|
|
# the value is a vector (list) of the specified type instead of a
|
|
|
|
# single value.
|
2005-03-23 19:25:48 +01:00
|
|
|
class VectorParamBase(ParamBase):
|
2005-01-15 10:12:25 +01:00
|
|
|
def __init__(self, type, *args, **kwargs):
|
2005-03-23 19:25:48 +01:00
|
|
|
ParamBase.__init__(self, type, *args, **kwargs)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def valid(self, value):
|
|
|
|
if value == None:
|
|
|
|
return True
|
|
|
|
|
2005-03-15 19:22:47 +01:00
|
|
|
if isinstance(value, (list, tuple)):
|
2005-01-15 10:12:25 +01:00
|
|
|
for val in value:
|
|
|
|
if not isinstance(val, Proxy):
|
2005-02-23 05:53:34 +01:00
|
|
|
self.ptype._convert(val)
|
2005-01-15 10:12:25 +01:00
|
|
|
elif not isinstance(value, Proxy):
|
2005-02-23 05:53:34 +01:00
|
|
|
self.ptype._convert(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
# Convert assigned value to appropriate type. If the RHS is not a
|
|
|
|
# list or tuple, it generates a single-element list.
|
|
|
|
def convert(self, value):
|
|
|
|
if value == None:
|
|
|
|
return []
|
|
|
|
|
2005-03-15 19:22:47 +01:00
|
|
|
if isinstance(value, (list, tuple)):
|
2005-01-15 10:12:25 +01:00
|
|
|
# list: coerce each element into new list
|
2005-02-23 05:53:34 +01:00
|
|
|
return [ self.ptype._convert(v) for v in value ]
|
2005-01-15 10:12:25 +01:00
|
|
|
else:
|
|
|
|
# singleton: coerce & wrap in a list
|
2005-02-23 05:53:34 +01:00
|
|
|
return self.ptype._convert(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def string(self, value):
|
2005-03-15 19:22:47 +01:00
|
|
|
if isinstance(value, (list, tuple)):
|
2005-02-23 05:53:34 +01:00
|
|
|
return ' '.join([ self.ptype._string(v) for v in value])
|
2005-01-15 10:12:25 +01:00
|
|
|
else:
|
2005-02-23 05:53:34 +01:00
|
|
|
return self.ptype._string(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
def cpp_decl(self, name):
|
|
|
|
return 'std::vector<%s> %s;' % (self.ptype._cpp_param_decl, name)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
class VectorParamFactory(ParamFactory):
|
2005-01-15 10:12:25 +01:00
|
|
|
# E.g., VectorParam.Int(5, "number of widgets")
|
|
|
|
def __call__(self, *args, **kwargs):
|
2005-03-23 19:25:48 +01:00
|
|
|
return VectorParamBase(self.ptype, *args, **kwargs)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
VectorParam = VectorParamFactory(None)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
#####################################################################
|
|
|
|
#
|
|
|
|
# Parameter Types
|
|
|
|
#
|
|
|
|
# Though native Python types could be used to specify parameter types
|
|
|
|
# (the 'ptype' field of the Param and VectorParam classes), it's more
|
|
|
|
# flexible to define our own set of types. This gives us more control
|
|
|
|
# over how Python expressions are converted to values (via the
|
|
|
|
# __init__() constructor) and how these values are printed out (via
|
|
|
|
# the __str__() conversion method). Eventually we'll need these types
|
|
|
|
# to correspond to distinct C++ types as well.
|
|
|
|
#
|
|
|
|
#####################################################################
|
2005-03-13 06:36:06 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
class MetaRange(type):
|
|
|
|
def __init__(cls, name, bases, dict):
|
|
|
|
super(MetaRange, cls).__init__(name, bases, dict)
|
|
|
|
if name == 'Range':
|
|
|
|
return
|
|
|
|
cls._cpp_param_decl = 'Range<%s>' % cls.type._cpp_param_decl
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
if not isinstance(value, Range):
|
|
|
|
raise TypeError, 'value %s is not a Pair' % value
|
|
|
|
value = cls(value)
|
|
|
|
value.first = cls.type._convert(value.first)
|
|
|
|
value.second = cls.type._convert(value.second)
|
|
|
|
return value
|
|
|
|
|
|
|
|
def _string(cls, value):
|
|
|
|
first = int(value.first)
|
|
|
|
second = int(value.second)
|
|
|
|
if value.extend:
|
|
|
|
second += first
|
|
|
|
if not value.inclusive:
|
|
|
|
second -= 1
|
|
|
|
return '%s:%s' % (cls.type._string(first), cls.type._string(second))
|
|
|
|
|
|
|
|
class Range(ParamType):
|
|
|
|
__metaclass__ = MetaRange
|
|
|
|
def __init__(self, *args, **kwargs):
|
|
|
|
if len(args) == 0:
|
|
|
|
self.first = kwargs.pop('start')
|
|
|
|
|
|
|
|
if 'end' in kwargs:
|
|
|
|
self.second = kwargs.pop('end')
|
|
|
|
self.inclusive = True
|
|
|
|
self.extend = False
|
|
|
|
elif 'size' in kwargs:
|
|
|
|
self.second = kwargs.pop('size')
|
|
|
|
self.inclusive = False
|
|
|
|
self.extend = True
|
|
|
|
else:
|
|
|
|
raise TypeError, "Either end or size must be specified"
|
|
|
|
|
|
|
|
elif len(args) == 1:
|
|
|
|
if kwargs:
|
|
|
|
self.first = args[0]
|
|
|
|
if 'end' in kwargs:
|
|
|
|
self.second = kwargs.pop('end')
|
|
|
|
self.inclusive = True
|
|
|
|
self.extend = False
|
|
|
|
elif 'size' in kwargs:
|
|
|
|
self.second = kwargs.pop('size')
|
|
|
|
self.inclusive = False
|
|
|
|
self.extend = True
|
|
|
|
else:
|
|
|
|
raise TypeError, "Either end or size must be specified"
|
|
|
|
elif isinstance(args[0], Range):
|
|
|
|
self.first = args[0].first
|
|
|
|
self.second = args[0].second
|
|
|
|
self.inclusive = args[0].inclusive
|
|
|
|
self.extend = args[0].extend
|
|
|
|
else:
|
|
|
|
self.first = 0
|
|
|
|
self.second = args[0]
|
|
|
|
self.inclusive = False
|
|
|
|
self.extend = True
|
|
|
|
|
|
|
|
elif len(args) == 2:
|
|
|
|
self.first, self.second = args
|
|
|
|
self.inclusive = True
|
|
|
|
self.extend = False
|
|
|
|
else:
|
|
|
|
raise TypeError, "Too many arguments specified"
|
|
|
|
|
|
|
|
if kwargs:
|
|
|
|
raise TypeError, "too many keywords: %s" % kwargs.keys()
|
2005-03-13 06:36:06 +01:00
|
|
|
|
|
|
|
# Metaclass for bounds-checked integer parameters. See CheckedInt.
|
|
|
|
class CheckedIntType(type):
|
|
|
|
def __init__(cls, name, bases, dict):
|
|
|
|
super(CheckedIntType, cls).__init__(name, bases, dict)
|
|
|
|
|
|
|
|
# CheckedInt is an abstract base class, so we actually don't
|
|
|
|
# want to do any processing on it... the rest of this code is
|
|
|
|
# just for classes that derive from CheckedInt.
|
|
|
|
if name == 'CheckedInt':
|
|
|
|
return
|
|
|
|
|
|
|
|
if not (hasattr(cls, 'min') and hasattr(cls, 'max')):
|
|
|
|
if not (hasattr(cls, 'size') and hasattr(cls, 'unsigned')):
|
|
|
|
panic("CheckedInt subclass %s must define either\n" \
|
|
|
|
" 'min' and 'max' or 'size' and 'unsigned'\n" \
|
|
|
|
% name);
|
|
|
|
if cls.unsigned:
|
|
|
|
cls.min = 0
|
|
|
|
cls.max = 2 ** cls.size - 1
|
|
|
|
else:
|
|
|
|
cls.min = -(2 ** (cls.size - 1))
|
|
|
|
cls.max = (2 ** (cls.size - 1)) - 1
|
|
|
|
|
|
|
|
cls._cpp_param_decl = cls.cppname
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
def _convert(cls, value):
|
2005-03-12 00:47:11 +01:00
|
|
|
if isinstance(value, bool):
|
2005-01-15 10:12:25 +01:00
|
|
|
return int(value)
|
|
|
|
|
2005-03-12 00:47:11 +01:00
|
|
|
if not isinstance(value, (int, long, float, str)):
|
|
|
|
raise TypeError, 'Integer param of invalid type %s' % type(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
if isinstance(value, float):
|
|
|
|
value = long(value)
|
|
|
|
elif isinstance(value, str):
|
|
|
|
value = toInteger(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
if not cls.min <= value <= cls.max:
|
2005-03-12 00:47:11 +01:00
|
|
|
raise TypeError, 'Integer param out of bounds %d < %d < %d' % \
|
2005-03-13 06:36:06 +01:00
|
|
|
(cls.min, value, cls.max)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
return value
|
|
|
|
|
|
|
|
def _string(cls, value):
|
|
|
|
return str(value)
|
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
# Abstract superclass for bounds-checked integer parameters. This
|
|
|
|
# class is subclassed to generate parameter classes with specific
|
|
|
|
# bounds. Initialization of the min and max bounds is done in the
|
|
|
|
# metaclass CheckedIntType.__init__.
|
2005-03-23 19:25:48 +01:00
|
|
|
class CheckedInt(long,ParamType):
|
2005-03-13 06:36:06 +01:00
|
|
|
__metaclass__ = CheckedIntType
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
class Int(CheckedInt): cppname = 'int'; size = 32; unsigned = False
|
|
|
|
class Unsigned(CheckedInt): cppname = 'unsigned'; size = 32; unsigned = True
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
class Int8(CheckedInt): cppname = 'int8_t'; size = 8; unsigned = False
|
|
|
|
class UInt8(CheckedInt): cppname = 'uint8_t'; size = 8; unsigned = True
|
|
|
|
class Int16(CheckedInt): cppname = 'int16_t'; size = 16; unsigned = False
|
|
|
|
class UInt16(CheckedInt): cppname = 'uint16_t'; size = 16; unsigned = True
|
|
|
|
class Int32(CheckedInt): cppname = 'int32_t'; size = 32; unsigned = False
|
|
|
|
class UInt32(CheckedInt): cppname = 'uint32_t'; size = 32; unsigned = True
|
|
|
|
class Int64(CheckedInt): cppname = 'int64_t'; size = 64; unsigned = False
|
|
|
|
class UInt64(CheckedInt): cppname = 'uint64_t'; size = 64; unsigned = True
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-04-06 23:05:30 +02:00
|
|
|
class Counter(CheckedInt): cppname = 'Counter'; size = 64; unsigned = True
|
|
|
|
class Tick(CheckedInt): cppname = 'Tick'; size = 64; unsigned = True
|
|
|
|
class TcpPort(CheckedInt): cppname = 'uint16_t'; size = 16; unsigned = True
|
|
|
|
class UdpPort(CheckedInt): cppname = 'uint16_t'; size = 16; unsigned = True
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-04-06 23:58:57 +02:00
|
|
|
class Percent(CheckedInt): cppname = 'int'; min = 0; max = 100
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
class MemorySize(CheckedInt):
|
|
|
|
cppname = 'uint64_t'
|
|
|
|
size = 64
|
|
|
|
unsigned = True
|
|
|
|
def __new__(cls, value):
|
|
|
|
return super(MemorySize, cls).__new__(cls, toMemorySize(value))
|
2005-03-13 06:36:06 +01:00
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
def _convert(cls, value):
|
2005-03-23 19:25:48 +01:00
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def _string(cls, value):
|
2005-03-23 19:25:48 +01:00
|
|
|
return '%d' % value
|
|
|
|
_string = classmethod(_string)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-26 04:59:29 +01:00
|
|
|
class Addr(CheckedInt):
|
|
|
|
cppname = 'Addr'
|
|
|
|
size = 64
|
|
|
|
unsigned = True
|
|
|
|
def __new__(cls, value):
|
|
|
|
try:
|
|
|
|
value = long(toMemorySize(value))
|
|
|
|
except TypeError:
|
|
|
|
value = long(value)
|
|
|
|
return super(Addr, cls).__new__(cls, value)
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
|
|
|
return '%d' % value
|
|
|
|
_string = classmethod(_string)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
class AddrRange(Range):
|
|
|
|
type = Addr
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
# Boolean parameter type.
|
2005-03-13 06:36:06 +01:00
|
|
|
class Bool(ParamType):
|
2005-03-08 02:56:02 +01:00
|
|
|
_cpp_param_decl = 'bool'
|
2005-03-26 04:59:29 +01:00
|
|
|
def __init__(self, value):
|
|
|
|
try:
|
|
|
|
self.value = toBool(value)
|
|
|
|
except TypeError:
|
|
|
|
self.value = bool(value)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
def _convert(cls, value):
|
2005-03-26 04:59:29 +01:00
|
|
|
return cls(value)
|
2005-03-23 19:25:48 +01:00
|
|
|
_convert = classmethod(_convert)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-23 19:25:48 +01:00
|
|
|
def _string(cls, value):
|
2005-03-26 04:59:29 +01:00
|
|
|
if value.value:
|
2005-01-15 10:12:25 +01:00
|
|
|
return "true"
|
|
|
|
else:
|
|
|
|
return "false"
|
2005-03-23 19:25:48 +01:00
|
|
|
_string = classmethod(_string)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
# String-valued parameter.
|
2005-03-13 06:36:06 +01:00
|
|
|
class String(ParamType):
|
2005-03-08 02:56:02 +01:00
|
|
|
_cpp_param_decl = 'string'
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
# Constructor. Value must be Python string.
|
|
|
|
def _convert(cls,value):
|
|
|
|
if value is None:
|
|
|
|
return ''
|
|
|
|
if isinstance(value, str):
|
|
|
|
return value
|
|
|
|
|
|
|
|
raise TypeError, \
|
|
|
|
"String param got value %s %s" % (repr(value), type(value))
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
# Generate printable string version. Not too tricky.
|
|
|
|
def _string(cls, value):
|
|
|
|
return value
|
|
|
|
_string = classmethod(_string)
|
|
|
|
|
|
|
|
def IncEthernetAddr(addr, val = 1):
|
|
|
|
bytes = map(lambda x: int(x, 16), addr.split(':'))
|
|
|
|
bytes[5] += val
|
|
|
|
for i in (5, 4, 3, 2, 1):
|
|
|
|
val,rem = divmod(bytes[i], 256)
|
|
|
|
bytes[i] = rem
|
|
|
|
if val == 0:
|
|
|
|
break
|
|
|
|
bytes[i - 1] += val
|
|
|
|
assert(bytes[0] <= 255)
|
|
|
|
return ':'.join(map(lambda x: '%02x' % x, bytes))
|
|
|
|
|
|
|
|
class NextEthernetAddr(object):
|
|
|
|
__metaclass__ = Singleton
|
|
|
|
addr = "00:90:00:00:00:01"
|
|
|
|
|
|
|
|
def __init__(self, inc = 1):
|
|
|
|
self.value = self.addr
|
|
|
|
self.addr = IncEthernetAddr(self.addr, inc)
|
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
class EthernetAddr(ParamType):
|
2005-03-08 02:56:02 +01:00
|
|
|
_cpp_param_decl = 'EthAddr'
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
if value == NextEthernetAddr:
|
|
|
|
return value
|
|
|
|
|
|
|
|
if not isinstance(value, str):
|
|
|
|
raise TypeError, "expected an ethernet address and didn't get one"
|
|
|
|
|
|
|
|
bytes = value.split(':')
|
|
|
|
if len(bytes) != 6:
|
|
|
|
raise TypeError, 'invalid ethernet address %s' % value
|
|
|
|
|
|
|
|
for byte in bytes:
|
|
|
|
if not 0 <= int(byte) <= 256:
|
|
|
|
raise TypeError, 'invalid ethernet address %s' % value
|
|
|
|
|
|
|
|
return value
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
|
|
|
if value == NextEthernetAddr:
|
|
|
|
value = value().value
|
|
|
|
return value
|
|
|
|
_string = classmethod(_string)
|
|
|
|
|
|
|
|
# Special class for NULL pointers. Note the special check in
|
|
|
|
# make_param_value() above that lets these be assigned where a
|
|
|
|
# SimObject is required.
|
|
|
|
# only one copy of a particular node
|
|
|
|
class NullSimObject(object):
|
|
|
|
__metaclass__ = Singleton
|
|
|
|
|
|
|
|
def __call__(cls):
|
|
|
|
return cls
|
|
|
|
|
|
|
|
def _instantiate(self, parent = None, path = ''):
|
|
|
|
pass
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
2005-04-07 00:00:44 +02:00
|
|
|
if value == None:
|
2005-01-15 10:12:25 +01:00
|
|
|
return
|
|
|
|
|
|
|
|
if isinstance(value, cls):
|
|
|
|
return value
|
|
|
|
|
|
|
|
raise TypeError, 'object %s %s of the wrong type, should be %s' % \
|
|
|
|
(repr(value), type(value), cls)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string():
|
|
|
|
return 'NULL'
|
|
|
|
_string = staticmethod(_string)
|
|
|
|
|
|
|
|
# The only instance you'll ever need...
|
|
|
|
Null = NULL = NullSimObject()
|
|
|
|
|
|
|
|
# Enumerated types are a little more complex. The user specifies the
|
|
|
|
# type as Enum(foo) where foo is either a list or dictionary of
|
|
|
|
# alternatives (typically strings, but not necessarily so). (In the
|
|
|
|
# long run, the integer value of the parameter will be the list index
|
|
|
|
# or the corresponding dictionary value. For now, since we only check
|
|
|
|
# that the alternative is valid and then spit it into a .ini file,
|
|
|
|
# there's not much point in using the dictionary.)
|
|
|
|
|
|
|
|
# What Enum() must do is generate a new type encapsulating the
|
|
|
|
# provided list/dictionary so that specific values of the parameter
|
|
|
|
# can be instances of that type. We define two hidden internal
|
|
|
|
# classes (_ListEnum and _DictEnum) to serve as base classes, then
|
|
|
|
# derive the new type from the appropriate base class on the fly.
|
|
|
|
|
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
# Metaclass for Enum types
|
|
|
|
class MetaEnum(type):
|
|
|
|
def __init__(cls, name, bases, init_dict):
|
|
|
|
if init_dict.has_key('map'):
|
|
|
|
if not isinstance(cls.map, dict):
|
|
|
|
raise TypeError, "Enum-derived class attribute 'map' " \
|
|
|
|
"must be of type dict"
|
|
|
|
# build list of value strings from map
|
|
|
|
cls.vals = cls.map.keys()
|
|
|
|
cls.vals.sort()
|
|
|
|
elif init_dict.has_key('vals'):
|
|
|
|
if not isinstance(cls.vals, list):
|
|
|
|
raise TypeError, "Enum-derived class attribute 'vals' " \
|
|
|
|
"must be of type list"
|
|
|
|
# build string->value map from vals sequence
|
|
|
|
cls.map = {}
|
|
|
|
for idx,val in enumerate(cls.vals):
|
|
|
|
cls.map[val] = idx
|
|
|
|
else:
|
|
|
|
raise TypeError, "Enum-derived class must define "\
|
|
|
|
"attribute 'map' or 'vals'"
|
|
|
|
|
|
|
|
cls._cpp_param_decl = name
|
|
|
|
|
|
|
|
super(MetaEnum, cls).__init__(name, bases, init_dict)
|
|
|
|
|
|
|
|
def cpp_declare(cls):
|
|
|
|
s = 'enum %s {\n ' % cls.__name__
|
|
|
|
s += ',\n '.join(['%s = %d' % (v,cls.map[v]) for v in cls.vals])
|
|
|
|
s += '\n};\n'
|
|
|
|
return s
|
|
|
|
|
|
|
|
# Base class for enum types.
|
2005-03-13 06:36:06 +01:00
|
|
|
class Enum(ParamType):
|
2005-03-08 02:56:02 +01:00
|
|
|
__metaclass__ = MetaEnum
|
|
|
|
vals = []
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
def _convert(self, value):
|
|
|
|
if value not in self.map:
|
|
|
|
raise TypeError, "Enum param got bad value '%s' (not in %s)" \
|
2005-03-08 02:56:02 +01:00
|
|
|
% (value, self.vals)
|
2005-01-15 10:12:25 +01:00
|
|
|
return value
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
# Generate printable string version of value.
|
|
|
|
def _string(self, value):
|
|
|
|
return str(value)
|
|
|
|
_string = classmethod(_string)
|
2005-03-26 04:59:29 +01:00
|
|
|
|
|
|
|
root_frequency = None
|
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
#
|
|
|
|
# "Constants"... handy aliases for various values.
|
|
|
|
#
|
2005-03-26 04:59:29 +01:00
|
|
|
class RootFrequency(float,ParamType):
|
|
|
|
_cpp_param_decl = 'Tick'
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-26 04:59:29 +01:00
|
|
|
def __new__(cls, value):
|
|
|
|
return super(cls, RootFrequency).__new__(cls, toFrequency(value))
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
return '%d' % int(round(value))
|
2005-03-26 04:59:29 +01:00
|
|
|
_string = classmethod(_string)
|
|
|
|
|
|
|
|
class ClockPeriod(float,ParamType):
|
|
|
|
_cpp_param_decl = 'Tick'
|
|
|
|
def __new__(cls, value):
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
absolute = False
|
2005-03-26 04:59:29 +01:00
|
|
|
relative = False
|
|
|
|
try:
|
|
|
|
val = toClockPeriod(value)
|
|
|
|
except ValueError, e:
|
|
|
|
if value.endswith('f'):
|
|
|
|
val = float(value[:-1])
|
|
|
|
if val:
|
|
|
|
val = 1 / val
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
relative = True
|
2005-03-26 04:59:29 +01:00
|
|
|
elif value.endswith('c'):
|
|
|
|
val = float(value[:-1])
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
relative = True
|
|
|
|
elif value.endswith('t'):
|
|
|
|
val = float(value[:-1])
|
|
|
|
absolute = True
|
2005-03-26 04:59:29 +01:00
|
|
|
else:
|
|
|
|
raise e
|
|
|
|
|
|
|
|
self = super(cls, ClockPeriod).__new__(cls, val)
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
self.absolute = absolute
|
2005-03-26 04:59:29 +01:00
|
|
|
self.relative = relative
|
|
|
|
return self
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
if value and not value.absolute:
|
|
|
|
if value.relative:
|
|
|
|
base = root_frequency / value.clock
|
|
|
|
else:
|
|
|
|
base = root_frequency
|
|
|
|
value *= base
|
2005-03-26 04:59:29 +01:00
|
|
|
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
return '%d' % int(round(value))
|
2005-03-26 04:59:29 +01:00
|
|
|
_string = classmethod(_string)
|
|
|
|
|
|
|
|
class Frequency(float,ParamType):
|
2005-03-24 18:24:17 +01:00
|
|
|
_cpp_param_decl = 'Tick'
|
|
|
|
|
|
|
|
def __new__(cls, value):
|
2005-03-26 04:59:29 +01:00
|
|
|
relative = False
|
|
|
|
try:
|
2005-03-24 18:24:17 +01:00
|
|
|
val = toFrequency(value)
|
2005-03-26 04:59:29 +01:00
|
|
|
except ValueError, e:
|
|
|
|
if value.endswith('f'):
|
|
|
|
val = float(value[:-1])
|
|
|
|
relative = True
|
|
|
|
else:
|
|
|
|
raise e
|
|
|
|
self = super(cls, Frequency).__new__(cls, val)
|
|
|
|
self.relative = relative
|
|
|
|
return self
|
2005-03-24 18:24:17 +01:00
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
if value:
|
|
|
|
if value.relative:
|
|
|
|
base = root_frequency / value.clock
|
|
|
|
else:
|
|
|
|
base = root_frequency
|
|
|
|
|
|
|
|
value = base / value
|
2005-03-26 04:59:29 +01:00
|
|
|
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
return '%d' % int(round(value))
|
2005-03-24 18:24:17 +01:00
|
|
|
_string = classmethod(_string)
|
|
|
|
|
2005-03-26 04:59:29 +01:00
|
|
|
class Latency(float,ParamType):
|
2005-03-24 18:24:17 +01:00
|
|
|
_cpp_param_decl = 'Tick'
|
|
|
|
def __new__(cls, value):
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
absolute = False
|
2005-03-26 04:59:29 +01:00
|
|
|
relative = False
|
|
|
|
try:
|
2005-03-24 18:24:17 +01:00
|
|
|
val = toLatency(value)
|
2005-03-26 04:59:29 +01:00
|
|
|
except ValueError, e:
|
|
|
|
if value.endswith('c'):
|
|
|
|
val = float(value[:-1])
|
|
|
|
relative = True
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
elif value.endswith('t'):
|
|
|
|
val = float(value[:-1])
|
|
|
|
absolute = True
|
2005-03-26 04:59:29 +01:00
|
|
|
else:
|
|
|
|
raise e
|
|
|
|
self = super(cls, Latency).__new__(cls, val)
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
self.absolute = absolute
|
2005-03-26 04:59:29 +01:00
|
|
|
self.relative = relative
|
|
|
|
return self
|
2005-03-24 18:24:17 +01:00
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
if value and not value.absolute:
|
|
|
|
if value.relative:
|
|
|
|
base = root_frequency / value.clock
|
|
|
|
else:
|
|
|
|
base = root_frequency
|
|
|
|
value *= base
|
|
|
|
return '%d' % int(round(value))
|
2005-03-24 18:24:17 +01:00
|
|
|
_string = classmethod(_string)
|
|
|
|
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
class NetworkBandwidth(float,ParamType):
|
|
|
|
_cpp_param_decl = 'float'
|
|
|
|
def __new__(cls, value):
|
|
|
|
val = toNetworkBandwidth(value) / 8.0
|
|
|
|
return super(cls, NetworkBandwidth).__new__(cls, val)
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
|
|
|
value = root_frequency / value
|
|
|
|
return '%f' % value
|
|
|
|
_string = classmethod(_string)
|
|
|
|
|
|
|
|
class MemoryBandwidth(float,ParamType):
|
|
|
|
_cpp_param_decl = 'float'
|
|
|
|
def __new__(self, value):
|
|
|
|
val = toMemoryBandwidth(value)
|
|
|
|
return super(cls, MemoryBandwidth).__new__(cls, val)
|
|
|
|
|
|
|
|
def _convert(cls, value):
|
|
|
|
return cls(value)
|
|
|
|
_convert = classmethod(_convert)
|
|
|
|
|
|
|
|
def _string(cls, value):
|
|
|
|
value = root_frequency / value
|
|
|
|
return '%f' % value
|
|
|
|
_string = classmethod(_string)
|
2005-03-24 18:24:17 +01:00
|
|
|
|
2005-01-15 10:12:25 +01:00
|
|
|
# Some memory range specifications use this as a default upper bound.
|
2005-03-23 19:25:48 +01:00
|
|
|
MaxAddr = Addr.max
|
2005-03-13 06:36:06 +01:00
|
|
|
MaxTick = Tick.max
|
2005-03-23 19:25:48 +01:00
|
|
|
AllMemory = AddrRange(0, MaxAddr)
|
2005-01-15 10:12:25 +01:00
|
|
|
|
|
|
|
#####################################################################
|
|
|
|
|
|
|
|
# The final hook to generate .ini files. Called from configuration
|
|
|
|
# script once config is built.
|
|
|
|
def instantiate(root):
|
2005-03-26 04:59:29 +01:00
|
|
|
global root_frequency
|
2005-01-15 10:12:25 +01:00
|
|
|
instance = root.instantiate('root')
|
2005-03-26 04:59:29 +01:00
|
|
|
root_frequency = RootFrequency._convert(root.frequency._getattr())
|
2005-01-15 10:12:25 +01:00
|
|
|
instance.fixup()
|
|
|
|
instance.display()
|
2005-01-27 22:01:25 +01:00
|
|
|
if not noDot:
|
|
|
|
dot = pydot.Dot()
|
|
|
|
instance.outputDot(dot)
|
|
|
|
dot.orientation = "portrait"
|
|
|
|
dot.size = "8.5,11"
|
|
|
|
dot.ranksep="equally"
|
|
|
|
dot.rank="samerank"
|
|
|
|
dot.write("config.dot")
|
|
|
|
dot.write_ps("config.ps")
|
2005-01-15 10:12:25 +01:00
|
|
|
|
2005-03-08 02:56:02 +01:00
|
|
|
# SimObject is a minimal extension of ConfigNode, implementing a
|
|
|
|
# hierarchy node that corresponds to an M5 SimObject. It prints out a
|
|
|
|
# "type=" line to indicate its SimObject class, prints out the
|
|
|
|
# assigned parameters corresponding to its class, and allows
|
|
|
|
# parameters to be set by keyword in the constructor. Note that most
|
|
|
|
# of the heavy lifting for the SimObject param handling is done in the
|
|
|
|
# MetaConfigNode metaclass.
|
2005-03-13 06:36:06 +01:00
|
|
|
class SimObject(ConfigNode, ParamType):
|
2005-03-08 02:56:02 +01:00
|
|
|
__metaclass__ = MetaSimObject
|
|
|
|
type = 'SimObject'
|
|
|
|
|
2005-03-13 06:36:06 +01:00
|
|
|
|
2005-03-13 06:54:34 +01:00
|
|
|
# __all__ defines the list of symbols that get exported when
|
|
|
|
# 'from config import *' is invoked. Try to keep this reasonably
|
|
|
|
# short to avoid polluting other namespaces.
|
2005-03-15 19:22:47 +01:00
|
|
|
__all__ = ['ConfigNode', 'SimObject', 'ParamContext', 'Param', 'VectorParam',
|
2005-03-16 06:40:48 +01:00
|
|
|
'parent', 'Enum',
|
2005-03-13 06:36:06 +01:00
|
|
|
'Int', 'Unsigned', 'Int8', 'UInt8', 'Int16', 'UInt16',
|
|
|
|
'Int32', 'UInt32', 'Int64', 'UInt64',
|
|
|
|
'Counter', 'Addr', 'Tick', 'Percent',
|
2005-03-26 04:59:29 +01:00
|
|
|
'MemorySize', 'RootFrequency', 'Frequency', 'Latency',
|
Make the notion of a global event tick independent of the actual
CPU cycle ticks. This allows the user to have CPUs of different
frequencies, and also allows frequencies and latencies that are
not evenly divisible by the CPU frequency. For now, the CPU
frequency is still set to the global frequency, but soon, we'll
hopefully make the global frequency fixed at something like 1THz
and set all other frequencies independently.
arch/alpha/ev5.cc:
The cycles counter is based on the current cpu cycle.
cpu/base_cpu.cc:
frequency isn't the cpu parameter anymore, cycleTime is.
cpu/base_cpu.hh:
frequency isn't the cpu parameter anymore, cycleTime is.
create several public functions for getting the cpu frequency
and the numbers of ticks for a given number of cycles, etc.
cpu/memtest/memtest.cc:
cpu/simple_cpu/simple_cpu.cc:
cpu/simple_cpu/simple_cpu.hh:
cpu/trace/trace_cpu.cc:
Now that ticks aren't cpu cycles, fixup code to advance
by the proper number of ticks.
cpu/memtest/memtest.hh:
cpu/trace/trace_cpu.hh:
Provide a function to get the number of ticks for a given
number of cycles.
dev/alpha_console.cc:
Update for changes in the way that frequencies and latencies are
accessed. Move some stuff to init()
dev/alpha_console.hh:
Need a pointer to the system and the cpu to get the frequency
so we can pass the info to the console code.
dev/etherbus.cc:
dev/etherbus.hh:
dev/etherlink.cc:
dev/etherlink.hh:
dev/ethertap.cc:
dev/ide_disk.hh:
dev/ns_gige.cc:
dev/ns_gige.hh:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
dev/ide_disk.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
Add some extra debugging printfs
dev/platform.cc:
dev/sinic.cc:
dev/sinic.hh:
outline the constructor and destructor
dev/platform.hh:
outline the constructor and destructor.
don't keep track of the interrupt frequency. Only provide the
accessor function.
dev/tsunami.cc:
dev/tsunami.hh:
outline the constructor and destructor
Don't set the interrupt frequency here. Get it from the actual device
that does the interrupting.
dev/tsunami_io.cc:
dev/tsunami_io.hh:
Make the interrupt interval a configuration parameter. (And convert
the interval to the new latency/frequency stuff in the python)
kern/linux/linux_system.cc:
update for changes in the way bandwidths are passed from
python to C++ to accomidate the new way that ticks works.
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
kern/tru64/tru64_system.cc:
For now, we must get the boot cpu's frequency as a parameter
since allowing the system to have a pointer to the boot cpu would
cause a cycle.
python/m5/config.py:
Fix support for cycle_time relative latencies and frequencies.
Add support for getting a NetworkBandwidth or a MemoryBandwidth.
python/m5/objects/BaseCPU.mpy:
All CPUs now have a cycle_time. The default is the global frequency,
but it is now possible to set the global frequency to some large value
(like 1THz) and set each CPU frequency independently.
python/m5/objects/BaseCache.mpy:
python/m5/objects/Ide.mpy:
Make this a Latency parameter
python/m5/objects/BaseSystem.mpy:
We need to pass the boot CPU's frequency to the system
python/m5/objects/Ethernet.mpy:
Update parameter types to use latency and bandwidth types
python/m5/objects/Platform.mpy:
this frequency isn't needed. We get it from the clock interrupt.
python/m5/objects/Tsunami.mpy:
The clock generator should hold the frequency
sim/eventq.hh:
Need to remove this assertion because the writeback event
queue is different from the CPU's event queue which can cause
this assertion to fail.
sim/process.cc:
Fix comment.
sim/system.hh:
Struct member to hold the boot CPU's frequency.
sim/universe.cc:
remove unneeded variable.
--HG--
extra : convert_revision : 51efe4041095234bf458d9b3b0d417f4cae16fdc
2005-04-11 21:32:06 +02:00
|
|
|
'ClockPeriod', 'NetworkBandwidth', 'MemoryBandwidth',
|
2005-03-23 19:25:48 +01:00
|
|
|
'Range', 'AddrRange', 'MaxAddr', 'MaxTick', 'AllMemory', 'NULL',
|
|
|
|
'NextEthernetAddr', 'instantiate']
|