gem5/tests/quick/00.hello/ref/x86/linux/simple-timing/simout

M5 Simulator System

Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved


M5 compiled Feb 23 2009 23:45:19
M5 revision 046e9580158a+ 5888+ default qtip tip delayedmissstats.patch
M5 started Feb 23 2009 23:59:10
M5 executing on tater
command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing -re tests/run.py quick/00.hello/x86/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0.  Starting simulation...
Hello world!
Exiting @ tick 33815000 because target called exit()
X86: Add x86 reference output for the timing CPU. 2008-11-10 06:57:15 +01:00			`M5 Simulator System`

			`Copyright (c) 2001-2008`
			`The Regents of The University of Michigan`
			`All Rights Reserved`


X86: Update stats for in place TLB miss handling. 2009-02-25 19:16:29 +01:00			`M5 compiled Feb 23 2009 23:45:19`
			`M5 revision 046e9580158a+ 5888+ default qtip tip delayedmissstats.patch`
			`M5 started Feb 23 2009 23:59:10`
			`M5 executing on tater`
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway. 2009-02-16 18:09:45 +01:00			`command line: build/X86_SE/m5.fast -d build/X86_SE/tests/fast/quick/00.hello/x86/linux/simple-timing -re tests/run.py quick/00.hello/x86/linux/simple-timing`
X86: Add x86 reference output for the timing CPU. 2008-11-10 06:57:15 +01:00			`Global frequency set at 1000000000000 ticks per second`
			`info: Entering event queue @ 0. Starting simulation...`
			`Hello world!`
X86: Update stats for in place TLB miss handling. 2009-02-25 19:16:29 +01:00			`Exiting @ tick 33815000 because target called exit()`