2006-02-03 20:54:37 +01:00
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/*
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2012-04-06 19:46:31 +02:00
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* Copyright (c) 2012 ARM Limited
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2010-11-08 20:58:25 +01:00
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* All rights reserved
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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2006-02-03 20:54:37 +01:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2006-06-01 01:26:56 +02:00
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*
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2012-04-06 19:46:31 +02:00
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* Authors: Andreas Hansson
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2006-02-03 20:54:37 +01:00
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*/
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2012-04-06 19:46:31 +02:00
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#include "debug/BusAddrRanges.hh"
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2006-02-15 20:21:09 +01:00
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#include "mem/physical.hh"
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2006-02-03 20:54:37 +01:00
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using namespace std;
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2012-01-25 18:18:25 +01:00
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2012-04-06 19:46:31 +02:00
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PhysicalMemory::PhysicalMemory(const vector<AbstractMemory*>& _memories) :
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size(0)
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2006-10-08 19:53:24 +02:00
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{
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2012-04-06 19:46:31 +02:00
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for (vector<AbstractMemory*>::const_iterator m = _memories.begin();
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m != _memories.end(); ++m) {
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// only add the memory if it is part of the global address map
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if ((*m)->isInAddrMap()) {
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memories.push_back(*m);
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2006-10-08 19:53:24 +02:00
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2012-04-06 19:46:31 +02:00
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// calculate the total size once and for all
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size += (*m)->size();
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2006-10-08 19:53:24 +02:00
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2012-04-06 19:46:31 +02:00
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// add the range to our interval tree and make sure it does not
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// intersect an existing range
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if (addrMap.insert((*m)->getAddrRange(), *m) == addrMap.end())
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fatal("Memory address range for %s is overlapping\n",
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(*m)->name());
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2006-10-08 19:53:24 +02:00
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}
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2012-04-06 19:46:31 +02:00
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DPRINTF(BusAddrRanges,
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"Skipping memory %s that is not in global address map\n",
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(*m)->name());
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2006-10-08 19:53:24 +02:00
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}
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2012-04-06 19:46:31 +02:00
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rangeCache.invalidate();
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2006-10-08 19:53:24 +02:00
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}
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bool
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2012-04-06 19:46:31 +02:00
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PhysicalMemory::isMemAddr(Addr addr) const
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{
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// see if the address is within the last matched range
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if (addr != rangeCache) {
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// lookup in the interval tree
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range_map<Addr, AbstractMemory*>::const_iterator r =
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addrMap.find(addr);
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if (r == addrMap.end()) {
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// not in the cache, and not in the tree
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return false;
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2006-10-08 19:53:24 +02:00
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}
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2012-04-06 19:46:31 +02:00
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// the range is in the tree, update the cache
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rangeCache = r->first;
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2006-10-08 19:53:24 +02:00
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}
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2012-04-06 19:46:31 +02:00
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assert(addrMap.find(addr) != addrMap.end());
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2007-02-12 19:06:30 +01:00
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2012-04-06 19:46:31 +02:00
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// either matched the cache or found in the tree
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return true;
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2006-03-26 00:31:20 +01:00
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}
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2012-01-17 19:55:09 +01:00
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AddrRangeList
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2012-04-06 19:46:31 +02:00
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PhysicalMemory::getConfAddrRanges() const
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2006-03-26 00:31:20 +01:00
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{
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2012-04-06 19:46:31 +02:00
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// this could be done once in the constructor, but since it is unlikely to
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// be called more than once the iteration should not be a problem
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2012-01-17 19:55:09 +01:00
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AddrRangeList ranges;
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2012-04-06 19:46:31 +02:00
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for (vector<AbstractMemory*>::const_iterator m = memories.begin();
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m != memories.end(); ++m) {
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if ((*m)->isConfReported()) {
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ranges.push_back((*m)->getAddrRange());
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}
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2007-05-19 06:24:34 +02:00
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}
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2012-04-06 19:46:31 +02:00
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return ranges;
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2006-07-21 01:03:47 +02:00
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}
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2006-02-22 23:29:04 +01:00
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2006-02-03 20:54:37 +01:00
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void
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2012-04-06 19:46:31 +02:00
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PhysicalMemory::access(PacketPtr pkt)
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2006-02-03 20:54:37 +01:00
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{
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2012-04-06 19:46:31 +02:00
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assert(pkt->isRequest());
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Addr addr = pkt->getAddr();
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range_map<Addr, AbstractMemory*>::const_iterator m = addrMap.find(addr);
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assert(m != addrMap.end());
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m->second->access(pkt);
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2006-02-03 20:54:37 +01:00
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}
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void
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2012-04-06 19:46:31 +02:00
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PhysicalMemory::functionalAccess(PacketPtr pkt)
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2006-02-03 20:54:37 +01:00
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{
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2012-04-06 19:46:31 +02:00
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assert(pkt->isRequest());
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Addr addr = pkt->getAddr();
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range_map<Addr, AbstractMemory*>::const_iterator m = addrMap.find(addr);
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assert(m != addrMap.end());
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m->second->functionalAccess(pkt);
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2006-02-03 20:54:37 +01:00
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}
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