2005-10-19 01:07:42 +02:00
|
|
|
/*
|
|
|
|
* Copyright (c) 2005 The Regents of The University of Michigan
|
|
|
|
* All rights reserved.
|
|
|
|
*
|
|
|
|
* Redistribution and use in source and binary forms, with or without
|
|
|
|
* modification, are permitted provided that the following conditions are
|
|
|
|
* met: redistributions of source code must retain the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer;
|
|
|
|
* redistributions in binary form must reproduce the above copyright
|
|
|
|
* notice, this list of conditions and the following disclaimer in the
|
|
|
|
* documentation and/or other materials provided with the distribution;
|
|
|
|
* neither the name of the copyright holders nor the names of its
|
|
|
|
* contributors may be used to endorse or promote products derived from
|
|
|
|
* this software without specific prior written permission.
|
|
|
|
*
|
|
|
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
|
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
|
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
|
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
|
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
|
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
|
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
|
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
|
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
|
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
2006-06-01 01:26:56 +02:00
|
|
|
*
|
|
|
|
* Authors: Nathan Binkert
|
2005-10-19 01:07:42 +02:00
|
|
|
*/
|
|
|
|
|
|
|
|
#include <string>
|
|
|
|
|
|
|
|
#include "arch/alpha/isa_traits.hh"
|
|
|
|
#include "arch/alpha/stacktrace.hh"
|
|
|
|
#include "arch/alpha/vtophys.hh"
|
|
|
|
#include "base/bitfield.hh"
|
|
|
|
#include "base/trace.hh"
|
|
|
|
#include "cpu/base.hh"
|
2006-06-06 23:32:21 +02:00
|
|
|
#include "cpu/thread_context.hh"
|
2006-03-08 01:59:12 +01:00
|
|
|
#include "sim/system.hh"
|
2005-10-19 01:07:42 +02:00
|
|
|
|
|
|
|
using namespace std;
|
Changes to untemplate StaticInst and StaticInstPtr, change the isa to a namespace instead of a class, an improvement to the architecture specific header file selection system, and fixed up a few include paths.
arch/alpha/alpha_linux_process.cc:
Added using directive for AlphaISA namespace
arch/alpha/alpha_memory.hh:
arch/alpha/isa/branch.isa:
cpu/pc_event.hh:
Added typedefs for Addr
arch/alpha/alpha_tru64_process.cc:
arch/alpha/arguments.cc:
Added using directive for AlphaISA
arch/alpha/ev5.hh:
Added an include of arch/alpha/isa_traits.hh, and a using directive for the AlphaISA namespace.
arch/alpha/faults.hh:
Added a typedef for the Addr type, and changed the formatting of the faults slightly.
arch/alpha/isa/main.isa:
Untemplatized StaticInst, added a using for namespace AlphaISA to show up in decoder.cc and the exec.ccs, relocated makeNop to decoder.hh
arch/alpha/isa/mem.isa:
Untemplatized StaticInst and StaticInstPtr
arch/alpha/isa/pal.isa:
cpu/base_dyn_inst.cc:
Untemplatized StaticInstPtr
arch/alpha/isa_traits.hh:
Changed variables to be externs instead of static since they are part of a namespace and not a class.
arch/alpha/stacktrace.cc:
Untemplatized StaticInstPtr, and added a using directive for AlphaISA.
arch/alpha/stacktrace.hh:
Added some typedefs for Addr and MachInst, and untemplatized StaticInstPtr
arch/alpha/vtophys.cc:
Added a using directive for AlphaISA
arch/alpha/vtophys.hh:
Added the AlphaISA namespace specifier where needed
arch/isa_parser.py:
Changed the placement of the definition of the decodeInst function to be outside the namespaceInst namespace.
base/loader/object_file.hh:
cpu/o3/bpred_unit.hh:
Added a typedef for Addr
base/loader/symtab.hh:
Added a typedef for Addr, and added a TheISA to Addr in another typedef
base/remote_gdb.cc:
Added a using namespace TheISA, and untemplatized StaticInstPtr
base/remote_gdb.hh:
Added typedefs for Addr and MachInst
cpu/base.cc:
Added TheISA specifier to some variables exported from the isa.
cpu/base.hh:
Added a typedef for Addr, and TheISA to some variables from the ISA
cpu/base_dyn_inst.hh:
Untemplatized StaticInstPtr, and added TheISA specifier to some variables from the ISA.
cpu/exec_context.hh:
Added some typedefs for types from the isa, and added TheISA specifier to some variables from the isa
cpu/exetrace.hh:
Added typedefs for some types from the ISA, and untemplatized StaticInstPtr
cpu/memtest/memtest.cc:
cpu/o3/btb.cc:
dev/baddev.cc:
dev/ide_ctrl.cc:
dev/ide_disk.cc:
dev/isa_fake.cc:
dev/ns_gige.cc:
dev/pciconfigall.cc:
dev/platform.cc:
dev/sinic.cc:
dev/uart8250.cc:
kern/freebsd/freebsd_system.cc:
kern/linux/linux_system.cc:
kern/system_events.cc:
kern/tru64/dump_mbuf.cc:
kern/tru64/tru64_events.cc:
sim/process.cc:
sim/pseudo_inst.cc:
sim/system.cc:
Added using namespace TheISA
cpu/memtest/memtest.hh:
cpu/trace/opt_cpu.hh:
cpu/trace/reader/itx_reader.hh:
dev/ide_disk.hh:
dev/pcidev.hh:
dev/platform.hh:
dev/tsunami.hh:
sim/system.hh:
sim/vptr.hh:
Added typedef for Addr
cpu/o3/2bit_local_pred.hh:
Changed the include to use arch/isa_traits.hh instead of arch/alpha/isa_traits.hh. Added typedef for Addr
cpu/o3/alpha_cpu.hh:
Added typedefs for Addr and IntReg
cpu/o3/alpha_cpu_impl.hh:
Added this-> to setNextPC to fix a problem since it didn't depend on template parameters any more. Removed "typename" where it was no longer needed.
cpu/o3/alpha_dyn_inst.hh:
Cleaned up some typedefs, and untemplatized StaticInst
cpu/o3/alpha_dyn_inst_impl.hh:
untemplatized StaticInstPtr
cpu/o3/alpha_impl.hh:
Fixed up a typedef of MachInst
cpu/o3/bpred_unit_impl.hh:
Added a using TheISA::MachInst to a function
cpu/o3/btb.hh:
Changed an include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr
cpu/o3/commit.hh:
Removed a typedef of Impl::ISA as ISA, since TheISA takes care of this now.
cpu/o3/cpu.cc:
Cleaned up namespace issues
cpu/o3/cpu.hh:
Cleaned up namespace usage
cpu/o3/decode.hh:
Removed typedef of ISA, and changed it to TheISA
cpu/o3/fetch.hh:
Fized up typedefs, and changed ISA to TheISA
cpu/o3/free_list.hh:
Changed include of arch/alpha/isa_traits.hh to arch/isa_traits.hh
cpu/o3/iew.hh:
Removed typedef of ISA
cpu/o3/iew_impl.hh:
Added TheISA namespace specifier to MachInst
cpu/o3/ras.hh:
Changed include from arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef for Addr.
cpu/o3/regfile.hh:
Changed ISA to TheISA, and added some typedefs for Addr, IntReg, FloatReg, and MiscRegFile
cpu/o3/rename.hh:
Changed ISA to TheISA, and added a typedef for RegIndex
cpu/o3/rename_map.hh:
Added an include for arch/isa_traits.hh, and a typedef for RegIndex
cpu/o3/rob.hh:
Added a typedef for RegIndex
cpu/o3/store_set.hh:
cpu/o3/tournament_pred.hh:
Changed an include of arch/alpha/isa_traits.hh to arch/isa_traits.hh, and added a typedef of Addr
cpu/ozone/cpu.hh:
Changed ISA into TheISA, and untemplatized StaticInst
cpu/pc_event.cc:
Added namespace specifier TheISA to Addr types
cpu/profile.hh:
kern/kernel_stats.hh:
Added typedef for Addr, and untemplatized StaticInstPtr
cpu/simple/cpu.cc:
Changed using directive from LittleEndianGuest to AlphaISA, which will contain both namespaces. Added TheISA where needed, and untemplatized StaticInst
cpu/simple/cpu.hh:
Added a typedef for MachInst, and untemplatized StaticInst
cpu/static_inst.cc:
Untemplatized StaticInst
cpu/static_inst.hh:
Untemplatized StaticInst by using the TheISA namespace
dev/alpha_console.cc:
Added using namespace AlphaISA
dev/simple_disk.hh:
Added typedef for Addr and fixed up some formatting
dev/sinicreg.hh:
Added TheISA namespace specifier where needed
dev/tsunami.cc:
dev/tsunami_io.cc:
dev/tsunami_pchip.cc:
Added using namespace TheISA. It might be better for it to be AlphaISA
dev/tsunami_cchip.cc:
Added typedef for TheISA. It might be better for it to be AlphaISA
kern/linux/aligned.hh:
sim/pseudo_inst.hh:
Added TheISA namespace specifier to Addr
kern/linux/linux_threadinfo.hh:
Added typedef for Addr, and TheISA namespace specifier to StackPointerReg
kern/tru64/mbuf.hh:
Added TheISA to Addr type in structs
sim/process.hh:
Added typedefs of Addr, RegFile, and MachInst
sim/syscall_emul.cc:
Added using namespace TheISA, and a cast of VMPageSize to the int type
sim/syscall_emul.hh:
Added typecast for Addr, and TheISA namespace specifier for where needed
--HG--
extra : convert_revision : 91d4f6ca33a73b21c1f1771d74bfdea3b80eff45
2006-02-19 08:34:37 +01:00
|
|
|
using namespace AlphaISA;
|
2005-10-19 01:07:42 +02:00
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
ProcessInfo::ProcessInfo(ThreadContext *_tc)
|
|
|
|
: tc(_tc)
|
2005-10-19 01:07:42 +02:00
|
|
|
{
|
|
|
|
Addr addr = 0;
|
|
|
|
|
2006-06-09 01:03:58 +02:00
|
|
|
VirtualPort *vp;
|
|
|
|
|
|
|
|
vp = tc->getVirtPort();
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_size", addr))
|
2005-10-19 01:07:42 +02:00
|
|
|
panic("thread info not compiled into kernel\n");
|
2006-06-09 01:03:58 +02:00
|
|
|
thread_info_size = vp->readGtoH<int32_t>(addr);
|
2005-10-19 01:07:42 +02:00
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_size", addr))
|
2005-10-19 01:07:42 +02:00
|
|
|
panic("thread info not compiled into kernel\n");
|
2006-06-09 01:03:58 +02:00
|
|
|
task_struct_size = vp->readGtoH<int32_t>(addr);
|
2005-10-19 01:07:42 +02:00
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (!tc->getSystemPtr()->kernelSymtab->findAddress("thread_info_task", addr))
|
2005-10-19 01:07:42 +02:00
|
|
|
panic("thread info not compiled into kernel\n");
|
2006-06-09 01:03:58 +02:00
|
|
|
task_off = vp->readGtoH<int32_t>(addr);
|
2005-10-19 01:07:42 +02:00
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_pid", addr))
|
2005-10-19 01:07:42 +02:00
|
|
|
panic("thread info not compiled into kernel\n");
|
2006-06-09 01:03:58 +02:00
|
|
|
pid_off = vp->readGtoH<int32_t>(addr);
|
2005-10-19 01:07:42 +02:00
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (!tc->getSystemPtr()->kernelSymtab->findAddress("task_struct_comm", addr))
|
2005-10-19 01:07:42 +02:00
|
|
|
panic("thread info not compiled into kernel\n");
|
2006-06-09 01:03:58 +02:00
|
|
|
name_off = vp->readGtoH<int32_t>(addr);
|
|
|
|
|
|
|
|
tc->delVirtPort(vp);
|
2005-10-19 01:07:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
Addr
|
|
|
|
ProcessInfo::task(Addr ksp) const
|
|
|
|
{
|
|
|
|
Addr base = ksp & ~0x3fff;
|
|
|
|
if (base == ULL(0xfffffc0000000000))
|
|
|
|
return 0;
|
|
|
|
|
2006-06-09 01:03:58 +02:00
|
|
|
Addr tsk;
|
|
|
|
|
|
|
|
VirtualPort *vp;
|
|
|
|
|
|
|
|
vp = tc->getVirtPort();
|
|
|
|
tsk = vp->readGtoH<Addr>(base + task_off);
|
|
|
|
tc->delVirtPort(vp);
|
|
|
|
|
|
|
|
return tsk;
|
2005-10-19 01:07:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
int
|
|
|
|
ProcessInfo::pid(Addr ksp) const
|
|
|
|
{
|
|
|
|
Addr task = this->task(ksp);
|
|
|
|
if (!task)
|
|
|
|
return -1;
|
|
|
|
|
2006-06-09 01:03:58 +02:00
|
|
|
uint16_t pd;
|
|
|
|
|
|
|
|
VirtualPort *vp;
|
|
|
|
|
|
|
|
vp = tc->getVirtPort();
|
|
|
|
pd = vp->readGtoH<uint16_t>(task + pid_off);
|
|
|
|
tc->delVirtPort(vp);
|
|
|
|
|
|
|
|
return pd;
|
2005-10-19 01:07:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
string
|
|
|
|
ProcessInfo::name(Addr ksp) const
|
|
|
|
{
|
|
|
|
Addr task = this->task(ksp);
|
|
|
|
if (!task)
|
|
|
|
return "console";
|
|
|
|
|
|
|
|
char comm[256];
|
2006-06-06 23:32:21 +02:00
|
|
|
CopyStringOut(tc, comm, task + name_off, sizeof(comm));
|
2005-10-19 01:07:42 +02:00
|
|
|
if (!comm[0])
|
|
|
|
return "startup";
|
|
|
|
|
|
|
|
return comm;
|
|
|
|
}
|
|
|
|
|
2005-11-20 23:44:58 +01:00
|
|
|
StackTrace::StackTrace()
|
2006-06-06 23:32:21 +02:00
|
|
|
: tc(0), stack(64)
|
2005-11-20 23:44:58 +01:00
|
|
|
{
|
|
|
|
}
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
|
|
|
|
: tc(0), stack(64)
|
2005-10-19 01:07:42 +02:00
|
|
|
{
|
2006-06-06 23:32:21 +02:00
|
|
|
trace(_tc, inst);
|
2005-11-20 23:44:58 +01:00
|
|
|
}
|
|
|
|
|
|
|
|
StackTrace::~StackTrace()
|
|
|
|
{
|
|
|
|
}
|
|
|
|
|
|
|
|
void
|
2006-06-06 23:32:21 +02:00
|
|
|
StackTrace::trace(ThreadContext *_tc, bool is_call)
|
2005-11-20 23:44:58 +01:00
|
|
|
{
|
2006-06-06 23:32:21 +02:00
|
|
|
tc = _tc;
|
2005-11-20 23:44:58 +01:00
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
bool usermode = (tc->readMiscReg(AlphaISA::IPR_DTB_CM) & 0x18) != 0;
|
2005-10-19 01:07:42 +02:00
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
Addr pc = tc->readNextPC();
|
|
|
|
bool kernel = tc->getSystemPtr()->kernelStart <= pc &&
|
|
|
|
pc <= tc->getSystemPtr()->kernelEnd;
|
2005-10-19 01:07:42 +02:00
|
|
|
|
|
|
|
if (usermode) {
|
2005-11-20 23:44:58 +01:00
|
|
|
stack.push_back(user);
|
2005-10-19 01:07:42 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
|
|
|
if (!kernel) {
|
2005-11-20 23:44:58 +01:00
|
|
|
stack.push_back(console);
|
2005-10-19 01:07:42 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
|
|
|
|
Addr ksp = tc->readIntReg(TheISA::StackPointerReg);
|
2005-10-19 01:07:42 +02:00
|
|
|
Addr bottom = ksp & ~0x3fff;
|
|
|
|
Addr addr;
|
|
|
|
|
|
|
|
if (is_call) {
|
|
|
|
if (!symtab->findNearestAddr(pc, addr))
|
|
|
|
panic("could not find address %#x", pc);
|
|
|
|
|
|
|
|
stack.push_back(addr);
|
2006-06-06 23:32:21 +02:00
|
|
|
pc = tc->readPC();
|
2005-10-19 01:07:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
Addr ra;
|
|
|
|
int size;
|
|
|
|
|
|
|
|
while (ksp > bottom) {
|
|
|
|
if (!symtab->findNearestAddr(pc, addr))
|
|
|
|
panic("could not find symbol for pc=%#x", pc);
|
|
|
|
assert(pc >= addr && "symbol botch: callpc < func");
|
|
|
|
|
|
|
|
stack.push_back(addr);
|
|
|
|
|
|
|
|
if (isEntry(addr))
|
|
|
|
return;
|
|
|
|
|
|
|
|
if (decodePrologue(ksp, pc, addr, size, ra)) {
|
|
|
|
if (!ra)
|
|
|
|
return;
|
|
|
|
|
2005-11-20 23:44:58 +01:00
|
|
|
if (size <= 0) {
|
|
|
|
stack.push_back(unknown);
|
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2005-10-19 01:07:42 +02:00
|
|
|
pc = ra;
|
|
|
|
ksp += size;
|
|
|
|
} else {
|
2005-11-20 23:44:58 +01:00
|
|
|
stack.push_back(unknown);
|
2005-10-19 01:07:42 +02:00
|
|
|
return;
|
|
|
|
}
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
bool kernel = tc->getSystemPtr()->kernelStart <= pc &&
|
|
|
|
pc <= tc->getSystemPtr()->kernelEnd;
|
2005-10-19 01:07:42 +02:00
|
|
|
if (!kernel)
|
|
|
|
return;
|
2005-11-20 23:44:58 +01:00
|
|
|
|
|
|
|
if (stack.size() >= 1000)
|
|
|
|
panic("unwinding too far");
|
2005-10-19 01:07:42 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
panic("unwinding too far");
|
|
|
|
}
|
|
|
|
|
|
|
|
bool
|
|
|
|
StackTrace::isEntry(Addr addr)
|
|
|
|
{
|
2006-06-06 23:32:21 +02:00
|
|
|
if (addr == tc->readMiscReg(AlphaISA::IPR_PALtemp12))
|
2005-10-19 01:07:42 +02:00
|
|
|
return true;
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (addr == tc->readMiscReg(AlphaISA::IPR_PALtemp7))
|
2005-10-19 01:07:42 +02:00
|
|
|
return true;
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (addr == tc->readMiscReg(AlphaISA::IPR_PALtemp11))
|
2005-10-19 01:07:42 +02:00
|
|
|
return true;
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (addr == tc->readMiscReg(AlphaISA::IPR_PALtemp21))
|
2005-10-19 01:07:42 +02:00
|
|
|
return true;
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (addr == tc->readMiscReg(AlphaISA::IPR_PALtemp9))
|
2005-10-19 01:07:42 +02:00
|
|
|
return true;
|
|
|
|
|
2006-06-06 23:32:21 +02:00
|
|
|
if (addr == tc->readMiscReg(AlphaISA::IPR_PALtemp2))
|
2005-10-19 01:07:42 +02:00
|
|
|
return true;
|
|
|
|
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool
|
|
|
|
StackTrace::decodeStack(MachInst inst, int &disp)
|
|
|
|
{
|
|
|
|
// lda $sp, -disp($sp)
|
|
|
|
//
|
|
|
|
// Opcode<31:26> == 0x08
|
|
|
|
// RA<25:21> == 30
|
|
|
|
// RB<20:16> == 30
|
|
|
|
// Disp<15:0>
|
|
|
|
const MachInst mem_mask = 0xffff0000;
|
|
|
|
const MachInst lda_pattern = 0x23de0000;
|
|
|
|
const MachInst lda_disp_mask = 0x0000ffff;
|
|
|
|
|
|
|
|
// subq $sp, disp, $sp
|
|
|
|
// addq $sp, disp, $sp
|
|
|
|
//
|
|
|
|
// Opcode<31:26> == 0x10
|
|
|
|
// RA<25:21> == 30
|
|
|
|
// Lit<20:13>
|
|
|
|
// One<12> = 1
|
|
|
|
// Func<11:5> == 0x20 (addq)
|
|
|
|
// Func<11:5> == 0x29 (subq)
|
|
|
|
// RC<4:0> == 30
|
|
|
|
const MachInst intop_mask = 0xffe01fff;
|
|
|
|
const MachInst addq_pattern = 0x43c0141e;
|
|
|
|
const MachInst subq_pattern = 0x43c0153e;
|
|
|
|
const MachInst intop_disp_mask = 0x001fe000;
|
|
|
|
const int intop_disp_shift = 13;
|
|
|
|
|
|
|
|
if ((inst & mem_mask) == lda_pattern)
|
|
|
|
disp = -sext<16>(inst & lda_disp_mask);
|
|
|
|
else if ((inst & intop_mask) == addq_pattern)
|
|
|
|
disp = -int((inst & intop_disp_mask) >> intop_disp_shift);
|
|
|
|
else if ((inst & intop_mask) == subq_pattern)
|
|
|
|
disp = int((inst & intop_disp_mask) >> intop_disp_shift);
|
|
|
|
else
|
|
|
|
return false;
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
bool
|
|
|
|
StackTrace::decodeSave(MachInst inst, int ®, int &disp)
|
|
|
|
{
|
|
|
|
// lda $stq, disp($sp)
|
|
|
|
//
|
|
|
|
// Opcode<31:26> == 0x08
|
|
|
|
// RA<25:21> == ?
|
|
|
|
// RB<20:16> == 30
|
|
|
|
// Disp<15:0>
|
|
|
|
const MachInst stq_mask = 0xfc1f0000;
|
|
|
|
const MachInst stq_pattern = 0xb41e0000;
|
|
|
|
const MachInst stq_disp_mask = 0x0000ffff;
|
|
|
|
const MachInst reg_mask = 0x03e00000;
|
|
|
|
const int reg_shift = 21;
|
|
|
|
|
|
|
|
if ((inst & stq_mask) == stq_pattern) {
|
|
|
|
reg = (inst & reg_mask) >> reg_shift;
|
|
|
|
disp = sext<16>(inst & stq_disp_mask);
|
|
|
|
} else {
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
/*
|
|
|
|
* Decode the function prologue for the function we're in, and note
|
|
|
|
* which registers are stored where, and how large the stack frame is.
|
|
|
|
*/
|
|
|
|
bool
|
|
|
|
StackTrace::decodePrologue(Addr sp, Addr callpc, Addr func,
|
|
|
|
int &size, Addr &ra)
|
|
|
|
{
|
|
|
|
size = 0;
|
|
|
|
ra = 0;
|
|
|
|
|
|
|
|
for (Addr pc = func; pc < callpc; pc += sizeof(MachInst)) {
|
|
|
|
MachInst inst;
|
2006-06-06 23:32:21 +02:00
|
|
|
CopyOut(tc, (uint8_t *)&inst, pc, sizeof(MachInst));
|
2005-10-19 01:07:42 +02:00
|
|
|
|
|
|
|
int reg, disp;
|
|
|
|
if (decodeStack(inst, disp)) {
|
|
|
|
if (size) {
|
|
|
|
// panic("decoding frame size again");
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
size += disp;
|
|
|
|
} else if (decodeSave(inst, reg, disp)) {
|
|
|
|
if (!ra && reg == ReturnAddressReg) {
|
2006-06-06 23:32:21 +02:00
|
|
|
CopyOut(tc, (uint8_t *)&ra, sp + disp, sizeof(Addr));
|
2005-10-19 01:07:42 +02:00
|
|
|
if (!ra) {
|
|
|
|
// panic("no return address value pc=%#x\n", pc);
|
|
|
|
return false;
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
|
|
|
return true;
|
|
|
|
}
|
|
|
|
|
|
|
|
#if TRACING_ON
|
|
|
|
void
|
|
|
|
StackTrace::dump()
|
|
|
|
{
|
2006-06-06 23:32:21 +02:00
|
|
|
StringWrap name(tc->getCpuPtr()->name());
|
|
|
|
SymbolTable *symtab = tc->getSystemPtr()->kernelSymtab;
|
2005-10-19 01:07:42 +02:00
|
|
|
|
|
|
|
DPRINTFN("------ Stack ------\n");
|
|
|
|
|
|
|
|
string symbol;
|
|
|
|
for (int i = 0, size = stack.size(); i < size; ++i) {
|
|
|
|
Addr addr = stack[size - i - 1];
|
2005-11-20 23:44:58 +01:00
|
|
|
if (addr == user)
|
2005-10-19 01:07:42 +02:00
|
|
|
symbol = "user";
|
2005-11-20 23:44:58 +01:00
|
|
|
else if (addr == console)
|
2005-10-19 01:07:42 +02:00
|
|
|
symbol = "console";
|
2005-11-20 23:44:58 +01:00
|
|
|
else if (addr == unknown)
|
2005-10-19 01:07:42 +02:00
|
|
|
symbol = "unknown";
|
|
|
|
else
|
|
|
|
symtab->findSymbol(addr, symbol);
|
|
|
|
|
|
|
|
DPRINTFN("%#x: %s\n", addr, symbol);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
#endif
|