2017-03-20 11:44:07 +01:00
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# Copyright (c) 2016-2017 ARM Limited
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2016-07-21 18:19:16 +02:00
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# All rights reserved.
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#
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# The license below extends only to copyright in the software and shall
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# not be construed as granting a license to any other intellectual
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# property including but not limited to intellectual property relating
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# to a hardware implementation of the functionality of the software
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# licensed hereunder. You may use the software subject to the license
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# terms below provided that you ensure that this notice is replicated
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# unmodified and in its entirety in all distributions of the software,
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# modified or unmodified, in source code or in binary form.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions are
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# met: redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer;
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# redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution;
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# neither the name of the copyright holders nor the names of its
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# contributors may be used to endorse or promote products derived from
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# this software without specific prior written permission.
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#
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# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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#
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# Authors: Gabor Dozsa
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# Andreas Sandberg
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# This is an example configuration script for full system simulation of
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# a generic ARM bigLITTLE system.
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import argparse
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import os
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import sys
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import m5
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2017-03-17 12:10:55 +01:00
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import m5.util
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2016-07-21 18:19:16 +02:00
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from m5.objects import *
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2016-10-14 16:37:38 +02:00
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m5.util.addToPath("../../")
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from common import SysPaths
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from common import CpuConfig
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2016-07-21 18:19:16 +02:00
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import devices
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2017-03-17 12:10:55 +01:00
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from devices import AtomicCluster, KvmCluster
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2016-07-21 18:19:16 +02:00
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default_dtb = 'armv8_gem5_v1_big_little_2_2.dtb'
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default_kernel = 'vmlinux4.3.aarch64'
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default_disk = 'aarch64-ubuntu-trusty-headless.img'
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default_rcs = 'bootscript.rcS'
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default_mem_size= "2GB"
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2017-03-17 12:10:55 +01:00
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def _to_ticks(value):
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"""Helper function to convert a latency from string format to Ticks"""
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return m5.ticks.fromSeconds(m5.util.convert.anyToLatency(value))
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def _using_pdes(root):
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"""Determine if the simulator is using multiple parallel event queues"""
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for obj in root.descendants():
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if not m5.proxy.isproxy(obj.eventq_index) and \
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obj.eventq_index != root.eventq_index:
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return True
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return False
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2016-09-15 19:00:59 +02:00
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class BigCluster(devices.CpuCluster):
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def __init__(self, system, num_cpus, cpu_clock,
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cpu_voltage="1.0V"):
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cpu_config = [ CpuConfig.get("arm_detailed"), devices.L1I, devices.L1D,
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devices.WalkCache, devices.L2 ]
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super(BigCluster, self).__init__(system, num_cpus, cpu_clock,
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cpu_voltage, *cpu_config)
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class LittleCluster(devices.CpuCluster):
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def __init__(self, system, num_cpus, cpu_clock,
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cpu_voltage="1.0V"):
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cpu_config = [ CpuConfig.get("minor"), devices.L1I, devices.L1D,
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devices.WalkCache, devices.L2 ]
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super(LittleCluster, self).__init__(system, num_cpus, cpu_clock,
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cpu_voltage, *cpu_config)
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2016-12-06 18:10:36 +01:00
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def createSystem(caches, kernel, bootscript, disks=[]):
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sys = devices.SimpleSystem(caches, default_mem_size,
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kernel=SysPaths.binary(kernel),
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readfile=bootscript,
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machine_type="DTOnly")
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sys.mem_ctrls = SimpleMemory(range=sys._mem_range)
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sys.mem_ctrls.port = sys.membus.master
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sys.connect()
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# Attach disk images
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if disks:
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def cow_disk(image_file):
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image = CowDiskImage()
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image.child.image_file = SysPaths.disk(image_file)
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return image
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sys.disk_images = [ cow_disk(f) for f in disks ]
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sys.pci_vio_block = [ PciVirtIO(vio=VirtIOBlock(image=img))
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for img in sys.disk_images ]
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for dev in sys.pci_vio_block:
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sys.attach_pci(dev)
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sys.realview.setupBootLoader(sys.membus, sys, SysPaths.binary)
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return sys
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2017-03-17 12:10:55 +01:00
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cpu_types = {
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"atomic" : (AtomicCluster, AtomicCluster),
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"timing" : (BigCluster, LittleCluster),
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}
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# Only add the KVM CPU if it has been compiled into gem5
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if devices.have_kvm:
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cpu_types["kvm"] = (KvmCluster, KvmCluster)
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2016-07-21 18:19:16 +02:00
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2017-02-14 22:09:18 +01:00
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def addOptions(parser):
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parser.add_argument("--restore-from", type=str, default=None,
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help="Restore from checkpoint")
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parser.add_argument("--dtb", type=str, default=default_dtb,
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help="DTB file to load")
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parser.add_argument("--kernel", type=str, default=default_kernel,
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help="Linux kernel")
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parser.add_argument("--disk", action="append", type=str, default=[],
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help="Disks to instantiate")
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parser.add_argument("--bootscript", type=str, default=default_rcs,
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help="Linux bootscript")
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parser.add_argument("--cpu-type", type=str, choices=cpu_types.keys(),
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default="timing",
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help="CPU simulation mode. Default: %(default)s")
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parser.add_argument("--kernel-init", type=str, default="/sbin/init",
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help="Override init")
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parser.add_argument("--big-cpus", type=int, default=1,
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help="Number of big CPUs to instantiate")
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parser.add_argument("--little-cpus", type=int, default=1,
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help="Number of little CPUs to instantiate")
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parser.add_argument("--caches", action="store_true", default=False,
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help="Instantiate caches")
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parser.add_argument("--last-cache-level", type=int, default=2,
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help="Last level of caches (e.g. 3 for L3)")
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parser.add_argument("--big-cpu-clock", type=str, default="2GHz",
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help="Big CPU clock frequency")
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parser.add_argument("--little-cpu-clock", type=str, default="1GHz",
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help="Little CPU clock frequency")
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parser.add_argument("--sim-quantum", type=str, default="1ms",
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help="Simulation quantum for parallel simulation. " \
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"Default: %(default)s")
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return parser
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def build(options):
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m5.ticks.fixGlobalFrequency()
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kernel_cmd = [
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"earlyprintk=pl011,0x1c090000",
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"console=ttyAMA0",
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"lpj=19988480",
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"norandmaps",
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"loglevel=8",
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"mem=%s" % default_mem_size,
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"root=/dev/vda1",
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"rw",
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"init=%s" % options.kernel_init,
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"vmalloc=768MB",
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]
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root = Root(full_system=True)
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2016-12-06 18:10:36 +01:00
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disks = [default_disk] if len(options.disk) == 0 else options.disk
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system = createSystem(options.caches,
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options.kernel,
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options.bootscript,
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disks=disks)
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root.system = system
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system.boot_osflags = " ".join(kernel_cmd)
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2016-09-15 19:00:59 +02:00
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if options.big_cpus + options.little_cpus == 0:
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m5.util.panic("Empty CPU clusters")
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big_model, little_model = cpu_types[options.cpu_type]
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all_cpus = []
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# big cluster
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if options.big_cpus > 0:
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system.bigCluster = big_model(system, options.big_cpus,
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options.big_cpu_clock)
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system.mem_mode = system.bigCluster.memoryMode()
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all_cpus += system.bigCluster.cpus
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# little cluster
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if options.little_cpus > 0:
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system.littleCluster = little_model(system, options.little_cpus,
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options.little_cpu_clock)
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system.mem_mode = system.littleCluster.memoryMode()
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all_cpus += system.littleCluster.cpus
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2017-03-17 12:10:55 +01:00
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# Figure out the memory mode
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if options.big_cpus > 0 and options.little_cpus > 0 and \
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system.littleCluster.memoryMode() != system.littleCluster.memoryMode():
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m5.util.panic("Memory mode missmatch among CPU clusters")
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# create caches
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system.addCaches(options.caches, options.last_cache_level)
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if not options.caches:
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if options.big_cpus > 0 and system.bigCluster.requireCaches():
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m5.util.panic("Big CPU model requires caches")
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if options.little_cpus > 0 and system.littleCluster.requireCaches():
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m5.util.panic("Little CPU model requires caches")
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2017-03-17 12:10:55 +01:00
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# Create a KVM VM and do KVM-specific configuration
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if issubclass(big_model, KvmCluster):
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_build_kvm(system, all_cpus)
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2016-07-21 18:19:16 +02:00
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# Linux device tree
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system.dtb_filename = SysPaths.binary(options.dtb)
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2017-02-14 22:09:18 +01:00
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return root
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def _build_kvm(system, cpus):
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system.kvm_vm = KvmVM()
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# Assign KVM CPUs to their own event queues / threads. This
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# has to be done after creating caches and other child objects
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# since these mustn't inherit the CPU event queue.
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if len(cpus) > 1:
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device_eq = 0
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first_cpu_eq = 1
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for idx, cpu in enumerate(cpus):
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# Child objects usually inherit the parent's event
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# queue. Override that and use the same event queue for
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# all devices.
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for obj in cpu.descendants():
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obj.eventq_index = device_eq
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cpu.eventq_index = first_cpu_eq + idx
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2017-02-14 22:09:18 +01:00
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2017-03-20 11:44:07 +01:00
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def instantiate(options, checkpoint_dir=None):
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# Setup the simulation quantum if we are running in PDES-mode
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# (e.g., when using KVM)
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root = Root.getInstance()
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if root and _using_pdes(root):
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m5.util.inform("Running in PDES mode with a %s simulation quantum.",
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options.sim_quantum)
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root.sim_quantum = _to_ticks(options.sim_quantum)
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2016-07-21 18:19:16 +02:00
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# Get and load from the chkpt or simpoint checkpoint
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if options.restore_from:
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if checkpoint_dir and not os.path.isabs(options.restore_from):
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cpt = os.path.join(checkpoint_dir, options.restore_from)
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else:
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cpt = options.restore_from
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m5.util.inform("Restoring from checkpoint %s", cpt)
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m5.instantiate(cpt)
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else:
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m5.instantiate()
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2017-02-14 22:09:18 +01:00
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def run(checkpoint_dir=m5.options.outdir):
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# start simulation (and drop checkpoints when requested)
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while True:
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event = m5.simulate()
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exit_msg = event.getCause()
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if exit_msg == "checkpoint":
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print "Dropping checkpoint at tick %d" % m5.curTick()
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cpt_dir = os.path.join(checkpoint_dir, "cpt.%d" % m5.curTick())
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m5.checkpoint(cpt_dir)
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print "Checkpoint done."
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else:
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print exit_msg, " @ ", m5.curTick()
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break
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sys.exit(event.getCode())
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2017-02-14 22:09:18 +01:00
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def main():
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parser = argparse.ArgumentParser(
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description="Generic ARM big.LITTLE configuration")
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addOptions(parser)
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options = parser.parse_args()
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root = build(options)
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instantiate(options)
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run()
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2016-07-21 18:19:16 +02:00
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if __name__ == "__m5_main__":
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main()
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