gem5/tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out

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[root]
type=Root
update_refs for ALPHA_FS with new disk image. tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/m5stats.txt: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stderr: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/stdout: update_refs --HG-- extra : convert_revision : 942d42bcd0ab962a7dda897e455329bf15105887
2007-04-23 20:40:46 +02:00
dummy=0
[system.physmem]
type=PhysicalMemory
file=
range=[0,134217727]
latency=1
zero=false
[system]
type=LinuxAlphaSystem
boot_cpu_frequency=500
physmem=system.physmem
Finish test clean-up & reorg. configs/common/FSConfig.py: Add default Machine() param configs/example/fs.py: configs/example/se.py: make it work again src/python/m5/objects/BaseCPU.py: Make mem PhysicalMemory so that a Parent.any proxy works well src/sim/process.cc: Increase default stack size so we don't get an 'increasing stack' message on 'hello world' tests/SConscript: Add full list of current configs. tests/configs/simple-atomic.py: tests/configs/simple-timing.py: don't need SEConfig anymore tests/quick/00.hello/test.py: tests/quick/20.eio-short/test.py: fix tests/run.py: move configs to separate dir --HG-- rename : configs/test/fs.py => configs/example/fs.py rename : configs/test/test.py => configs/example/se.py rename : tests/simple-atomic.py => tests/configs/simple-atomic.py rename : tests/simple-timing.py => tests/configs/simple-timing.py rename : tests/linux-mpboot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini rename : tests/linux-mpboot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out rename : tests/linux-mpboot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console rename : tests/linux-mpboot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt rename : tests/linux-mpboot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr rename : tests/linux-mpboot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout rename : tests/linux-boot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini rename : tests/linux-boot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out rename : tests/linux-boot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console rename : tests/linux-boot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt rename : tests/linux-boot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr rename : tests/linux-boot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout rename : tests/linux-mpboot/ref/alpha/timing/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini rename : tests/linux-mpboot/ref/alpha/timing/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out rename : tests/linux-mpboot/ref/alpha/timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console rename : tests/linux-mpboot/ref/alpha/timing/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt rename : tests/linux-mpboot/ref/alpha/timing/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr rename : tests/linux-mpboot/ref/alpha/timing/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout rename : tests/test-progs/hello/bin/mips/linux/hello_mips => tests/test-progs/hello/bin/mips/linux/hello rename : tests/test-progs/hello/bin/sparc/bin => tests/test-progs/hello/bin/sparc/linux/hello extra : convert_revision : d68ee6d7eefa7ba57370f3fb3c3589f86a6ea6b4
2006-08-16 20:42:44 +02:00
mem_mode=timing
kernel=/dist/m5/system/binaries/vmlinux
console=/dist/m5/system/binaries/console
pal=/dist/m5/system/binaries/ts_osfpal
boot_osflags=root=/dev/hda1 console=ttyS0
Finish test clean-up & reorg. configs/common/FSConfig.py: Add default Machine() param configs/example/fs.py: configs/example/se.py: make it work again src/python/m5/objects/BaseCPU.py: Make mem PhysicalMemory so that a Parent.any proxy works well src/sim/process.cc: Increase default stack size so we don't get an 'increasing stack' message on 'hello world' tests/SConscript: Add full list of current configs. tests/configs/simple-atomic.py: tests/configs/simple-timing.py: don't need SEConfig anymore tests/quick/00.hello/test.py: tests/quick/20.eio-short/test.py: fix tests/run.py: move configs to separate dir --HG-- rename : configs/test/fs.py => configs/example/fs.py rename : configs/test/test.py => configs/example/se.py rename : tests/simple-atomic.py => tests/configs/simple-atomic.py rename : tests/simple-timing.py => tests/configs/simple-timing.py rename : tests/linux-mpboot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini rename : tests/linux-mpboot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out rename : tests/linux-mpboot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console rename : tests/linux-mpboot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt rename : tests/linux-mpboot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr rename : tests/linux-mpboot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout rename : tests/linux-boot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini rename : tests/linux-boot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out rename : tests/linux-boot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console rename : tests/linux-boot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt rename : tests/linux-boot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr rename : tests/linux-boot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout rename : tests/linux-mpboot/ref/alpha/timing/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini rename : tests/linux-mpboot/ref/alpha/timing/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out rename : tests/linux-mpboot/ref/alpha/timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console rename : tests/linux-mpboot/ref/alpha/timing/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt rename : tests/linux-mpboot/ref/alpha/timing/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr rename : tests/linux-mpboot/ref/alpha/timing/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout rename : tests/test-progs/hello/bin/mips/linux/hello_mips => tests/test-progs/hello/bin/mips/linux/hello rename : tests/test-progs/hello/bin/sparc/bin => tests/test-progs/hello/bin/sparc/linux/hello extra : convert_revision : d68ee6d7eefa7ba57370f3fb3c3589f86a6ea6b4
2006-08-16 20:42:44 +02:00
readfile=tests/halt.sh
symbolfile=
init_param=0
system_type=34
system_rev=1024
[system.membus]
type=Bus
bus_id=1
clock=1000
Updates refs. tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout: Update refs. --HG-- extra : convert_revision : 5341341507ddbe1211992e5f72013d7be0000bae
2006-10-10 17:04:05 +02:00
width=64
responder_set=false
block_size=64
[system.intrctrl]
type=IntrControl
Implement Niagara I/O interface and rework interrupts configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03 23:22:47 +01:00
sys=system
[system.tsunami]
type=Tsunami
system=system
intrctrl=system.intrctrl
[system.membus.responder]
type=IsaFake
pio_addr=0
pio_latency=1
pio_size=8
ret_bad_addr=true
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.l2c]
type=BaseCache
size=4194304
assoc=8
block_size=64
latency=10000
mshrs=92
tgts_per_mshr=16
write_buffers=8
prioritizeRequests=false
protocol=null
trace_addr=0
hash_delay=1
repl=null
compressed_bus=false
store_compressed=false
adaptive_compression=false
compression_latency=0
block_size=64
max_miss_count=0
addr_range=[0,18446744073709551615]
split=false
split_size=0
lifo=false
two_queue=false
prefetch_miss=false
prefetch_access=false
prefetcher_size=100
prefetch_past_page=false
prefetch_serial_squash=false
prefetch_latency=10
prefetch_degree=1
prefetch_policy=none
prefetch_cache_check_push=true
prefetch_use_cpu_id=true
prefetch_data_accesses_only=false
[system.bridge]
type=Bridge
req_size_a=16
req_size_b=16
resp_size_a=16
resp_size_b=16
delay=50000
nack_delay=4000
write_ack=false
fix_partial_write_a=false
fix_partial_write_b=true
[system.disk0.image.child]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.disk0.image]
type=CowDiskImage
child=system.disk0.image.child
image_file=
table_size=65536
read_only=false
[system.disk0]
type=IdeDisk
image=system.disk0.image
driveID=master
delay=1000000
[system.disk2.image.child]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-bigswap2.img
read_only=true
[system.disk2.image]
type=CowDiskImage
child=system.disk2.image.child
image_file=
table_size=65536
read_only=false
[system.disk2]
type=IdeDisk
image=system.disk2.image
driveID=master
delay=1000000
[system.simple_disk.disk]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.simple_disk]
type=SimpleDisk
system=system
disk=system.simple_disk.disk
[system.tsunami.fake_uart1]
type=IsaFake
pio_addr=8804615848696
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_uart2]
type=IsaFake
pio_addr=8804615848936
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_uart3]
type=IsaFake
pio_addr=8804615848680
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_uart4]
type=IsaFake
pio_addr=8804615848944
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_ppc]
type=IsaFake
pio_addr=8804615848891
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.cchip]
type=TsunamiCChip
pio_addr=8803072344064
pio_latency=1000
platform=system.tsunami
system=system
tsunami=system.tsunami
[system.tsunami.io]
type=TsunamiIO
pio_addr=8804615847936
pio_latency=1000
frequency=976562500
platform=system.tsunami
system=system
time=2009 1 1 0 0 0 3 1
year_is_bcd=false
tsunami=system.tsunami
[]
type=PciConfigAll
pio_latency=1
bus=0
size=16777216
platform=system.tsunami
system=system
[system.sim_console]
type=SimConsole
intr_control=system.intrctrl
output=console
Implement Niagara I/O interface and rework interrupts configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03 23:22:47 +01:00
port=3456
append_name=true
number=0
Implement Niagara I/O interface and rework interrupts configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03 23:22:47 +01:00
[system.cpu.itb]
type=AlphaITB
size=48
[system.cpu.dtb]
type=AlphaDTB
size=64
[system.cpu]
type=TimingSimpleCPU
max_insts_any_thread=0
max_insts_all_threads=0
max_loads_any_thread=0
max_loads_all_threads=0
progress_interval=0
system=system
cpu_id=0
itb=system.cpu.itb
dtb=system.cpu.dtb
profile=0
do_quiesce=true
do_checkpoint_insts=true
do_statistics_insts=true
clock=500
Implement Niagara I/O interface and rework interrupts configs/common/FSConfig.py: Use binaries we've compiled instead of the ones that come with Legion src/arch/alpha/interrupts.hh: get rid of post(int int_type) and add a get_vec function that gets the interrupt vector for an interrupt number src/arch/sparc/asi.cc: Add AsiIsInterrupt() to AsiIsMmu() src/arch/sparc/faults.cc: src/arch/sparc/faults.hh: Add InterruptVector type src/arch/sparc/interrupts.hh: rework interrupts. They are no longer cleared when created... A I/O or ASI read/write needs to happen before they are cleared src/arch/sparc/isa_traits.hh: Add the "interrupt" trap types to isa traits src/arch/sparc/miscregfile.cc: add names for all the misc registers and possible post an interrupt when TL is changed. src/arch/sparc/miscregfile.hh: Add a helper function to post an interrupt when pil < some set softint src/arch/sparc/regfile.cc: src/arch/sparc/regfile.hh: InterruptLevel shouldn't really live here, moved to interrupt.hh src/arch/sparc/tlb.cc: Add interrupt ASIs to TLB src/arch/sparc/ua2005.cc: Add checkSoftInt to check if a softint needs to be posted Check that a tickCompare isn't scheduled before scheduling one Post and clear interrupts on queue writes and what not src/base/bitfield.hh: Add an helper function to return the msb that is set src/cpu/base.cc: src/cpu/base.hh: get rid of post_interrupt(type) since it's no longer needed.. Add a way to see what interrupts are pending src/cpu/intr_control.cc: src/cpu/intr_control.hh: src/dev/alpha/tsunami_cchip.cc: src/python/m5/objects/IntrControl.py: Make IntrControl have a system pointer rather than using a cpu pointer to get one src/dev/sparc/SConscript: add iob to SConsscrip tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.ini: tests/quick/80.netperf-stream/ref/alpha/linux/twosys-tsunami-simple-atomic/config.out: update config.ini/out for intrcntrl not having a cpu pointer anymore --HG-- extra : convert_revision : 38614f6b9ffc8f3c93949a94ff04b7d2987168dd
2007-03-03 23:22:47 +01:00
phase=0
defer_registration=false
// width not specified
function_trace=false
function_trace_start=0
// simulate_stalls not specified
[system.tsunami.console]
type=AlphaConsole
sim_console=system.sim_console
disk=system.simple_disk
pio_addr=8804682956800
system=system
cpu=system.cpu
platform=system.tsunami
pio_latency=1000
[system.tsunami.fake_ata1]
type=IsaFake
pio_addr=8804615848304
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_ata0]
type=IsaFake
pio_addr=8804615848432
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.pchip]
type=TsunamiPChip
pio_addr=8802535473152
pio_latency=1000
platform=system.tsunami
system=system
tsunami=system.tsunami
[system.tsunami.fake_pnp_read3]
type=IsaFake
pio_addr=8804615848643
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read2]
type=IsaFake
pio_addr=8804615848579
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read1]
type=IsaFake
pio_addr=8804615848515
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read0]
type=IsaFake
pio_addr=8804615848451
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read7]
type=IsaFake
pio_addr=8804615848899
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read6]
type=IsaFake
pio_addr=8804615848835
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read5]
type=IsaFake
pio_addr=8804615848771
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read4]
type=IsaFake
pio_addr=8804615848707
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_write]
type=IsaFake
pio_addr=8804615850617
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fb]
type=BadDevice
devicename=FrameBuffer
pio_addr=8804615848912
system=system
platform=system.tsunami
pio_latency=1000
[system.tsunami.ethernet.configdata]
type=PciConfigData
VendorID=4107
DeviceID=34
Command=0
Status=656
Revision=0
ProgIF=0
SubClassCode=0
ClassCode=2
CacheLineSize=0
LatencyTimer=0
HeaderType=0
BIST=0
BAR0=1
BAR1=0
BAR2=0
BAR3=0
BAR4=0
BAR5=0
CardbusCIS=0
SubsystemVendorID=0
SubsystemID=0
ExpansionROM=0
InterruptLine=30
InterruptPin=1
MinimumGrant=176
MaximumLatency=52
BAR0Size=256
BAR1Size=4096
BAR2Size=0
BAR3Size=0
BAR4Size=0
BAR5Size=0
[system.tsunami.ethernet]
type=NSGigE
system=system
platform=system.tsunami
min_backoff_delay=4000
max_backoff_delay=10000000
configdata=system.tsunami.ethernet.configdata
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=1000
config_latency=20000
clock=0
dma_desc_free=false
dma_data_free=false
dma_read_delay=0
dma_write_delay=0
dma_read_factor=0
dma_write_factor=0
dma_no_allocate=true
intr_delay=10000000
rx_delay=1000000
tx_delay=1000000
rx_fifo_size=524288
tx_fifo_size=524288
rx_filter=true
hardware_address=00:90:00:00:00:01
rx_thread=false
tx_thread=false
rss=false
[system.tsunami.etherint]
type=NSGigEInt
peer=null
device=system.tsunami.ethernet
[system.tsunami.fake_OROM]
type=IsaFake
pio_addr=8796093677568
pio_latency=1000
pio_size=393216
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.uart]
type=Uart8250
pio_addr=8804615848952
pio_latency=1000
platform=system.tsunami
sim_console=system.sim_console
system=system
[system.tsunami.fake_sm_chip]
type=IsaFake
pio_addr=8804615848816
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_addr]
type=IsaFake
pio_addr=8804615848569
pio_latency=1000
pio_size=8
ret_bad_addr=false
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.tsunami.ide.configdata]
type=PciConfigData
VendorID=32902
DeviceID=28945
Command=0
Status=640
Revision=0
ProgIF=133
SubClassCode=1
ClassCode=1
CacheLineSize=0
LatencyTimer=0
HeaderType=0
BIST=0
BAR0=1
BAR1=1
BAR2=1
BAR3=1
BAR4=1
BAR5=1
CardbusCIS=0
SubsystemVendorID=0
SubsystemID=0
ExpansionROM=0
InterruptLine=31
InterruptPin=1
MinimumGrant=0
MaximumLatency=0
BAR0Size=8
BAR1Size=4
BAR2Size=8
BAR3Size=4
BAR4Size=16
BAR5Size=0
[system.tsunami.ide]
type=IdeController
system=system
platform=system.tsunami
min_backoff_delay=4000
max_backoff_delay=10000000
configdata=system.tsunami.ide.configdata
pci_bus=0
pci_dev=0
pci_func=0
pio_latency=1000
config_latency=20000
disks=system.disk0 system.disk2
[system.toL2Bus]
type=Bus
bus_id=0
clock=1000
width=64
responder_set=false
block_size=64
[system.toL2Bus.responder]
type=IsaFake
pio_addr=0
pio_latency=1
pio_size=8
ret_bad_addr=true
update_data=false
warn_access=
ret_data8=255
ret_data16=65535
ret_data32=4294967295
ret_data64=18446744073709551615
platform=system.tsunami
system=system
[system.iobus]
type=Bus
bus_id=0
clock=1000
Updates refs. tests/quick/00.hello/ref/alpha/linux/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/o3-timing/config.out: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/linux/simple-timing/config.out: tests/quick/00.hello/ref/alpha/linux/simple-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/linux/simple-timing/stdout: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/o3-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-atomic/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.ini: tests/quick/00.hello/ref/alpha/tru64/simple-timing/config.out: tests/quick/00.hello/ref/alpha/tru64/simple-timing/m5stats.txt: tests/quick/00.hello/ref/alpha/tru64/simple-timing/stdout: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.ini: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/config.out: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/m5stats.txt: tests/quick/01.hello-2T-smt/ref/alpha/linux/o3-timing/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr: tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout: Update refs. --HG-- extra : convert_revision : 5341341507ddbe1211992e5f72013d7be0000bae
2006-10-10 17:04:05 +02:00
width=64
responder_set=true
block_size=64
[system.cpu.icache.protocol]
type=CoherenceProtocol
protocol=moesi
do_upgrades=true
[system.cpu.icache]
type=BaseCache
size=32768
assoc=1
block_size=64
latency=1000
mshrs=4
tgts_per_mshr=8
write_buffers=8
prioritizeRequests=false
protocol=system.cpu.icache.protocol
trace_addr=0
hash_delay=1
repl=null
compressed_bus=false
store_compressed=false
adaptive_compression=false
compression_latency=0
block_size=64
max_miss_count=0
addr_range=[0,18446744073709551615]
split=false
split_size=0
lifo=false
two_queue=false
prefetch_miss=false
prefetch_access=false
prefetcher_size=100
prefetch_past_page=false
prefetch_serial_squash=false
prefetch_latency=10
prefetch_degree=1
prefetch_policy=none
prefetch_cache_check_push=true
prefetch_use_cpu_id=true
prefetch_data_accesses_only=false
[system.cpu.dcache.protocol]
type=CoherenceProtocol
protocol=moesi
do_upgrades=true
[system.cpu.dcache]
type=BaseCache
size=32768
assoc=4
block_size=64
latency=1000
mshrs=4
tgts_per_mshr=8
write_buffers=8
prioritizeRequests=false
protocol=system.cpu.dcache.protocol
trace_addr=0
hash_delay=1
repl=null
compressed_bus=false
store_compressed=false
adaptive_compression=false
compression_latency=0
block_size=64
max_miss_count=0
addr_range=[0,18446744073709551615]
split=false
split_size=0
lifo=false
two_queue=false
prefetch_miss=false
prefetch_access=false
prefetcher_size=100
prefetch_past_page=false
prefetch_serial_squash=false
prefetch_latency=10
prefetch_degree=1
prefetch_policy=none
prefetch_cache_check_push=true
prefetch_use_cpu_id=true
prefetch_data_accesses_only=false