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Finish test clean-up & reorg.

Browse source 
configs/common/FSConfig.py:
    Add default Machine() param
configs/example/fs.py:
configs/example/se.py:
    make it work again
src/python/m5/objects/BaseCPU.py:
    Make mem PhysicalMemory so that a Parent.any proxy works well
src/sim/process.cc:
    Increase default stack size so we don't get an
    'increasing stack' message on 'hello world'
tests/SConscript:
    Add full list of current configs.
tests/configs/simple-atomic.py:
tests/configs/simple-timing.py:
    don't need SEConfig anymore
tests/quick/00.hello/test.py:
tests/quick/20.eio-short/test.py:
    fix
tests/run.py:
    move configs to separate dir

--HG--
rename : configs/test/fs.py => configs/example/fs.py
rename : configs/test/test.py => configs/example/se.py
rename : tests/simple-atomic.py => tests/configs/simple-atomic.py
rename : tests/simple-timing.py => tests/configs/simple-timing.py
rename : tests/linux-mpboot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
rename : tests/linux-mpboot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out
rename : tests/linux-mpboot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console
rename : tests/linux-mpboot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt
rename : tests/linux-mpboot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr
rename : tests/linux-mpboot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
rename : tests/linux-boot/ref/alpha/atomic/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
rename : tests/linux-boot/ref/alpha/atomic/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out
rename : tests/linux-boot/ref/alpha/atomic/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console
rename : tests/linux-boot/ref/alpha/atomic/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt
rename : tests/linux-boot/ref/alpha/atomic/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr
rename : tests/linux-boot/ref/alpha/atomic/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
rename : tests/linux-mpboot/ref/alpha/timing/config.ini => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
rename : tests/linux-mpboot/ref/alpha/timing/config.out => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out
rename : tests/linux-mpboot/ref/alpha/timing/console.system.sim_console => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console
rename : tests/linux-mpboot/ref/alpha/timing/m5stats.txt => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
rename : tests/linux-mpboot/ref/alpha/timing/stderr => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr
rename : tests/linux-mpboot/ref/alpha/timing/stdout => tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
rename : tests/test-progs/hello/bin/mips/linux/hello_mips => tests/test-progs/hello/bin/mips/linux/hello
rename : tests/test-progs/hello/bin/sparc/bin => tests/test-progs/hello/bin/sparc/linux/hello
extra : convert_revision : d68ee6d7eefa7ba57370f3fb3c3589f86a6ea6b4
This commit is contained in:
Steve Reinhardt 2006-08-16 14:42:44 -04:00
parent 3298c0b222
commit bd4ccd6e39
46 changed files with 1866 additions and 220 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

5
configs/common/FSConfig.py
View file

@ -46,8 +46,11 @@ class BaseTsunami(Tsunami):
ide = IdeController(disks=[Parent.disk0, Parent.disk2],
pci_func=0, pci_dev=0, pci_bus=0)
def makeLinuxAlphaSystem(mem_mode, mdesc):
def makeLinuxAlphaSystem(mem_mode, mdesc = None):
self = LinuxAlphaSystem()
if not mdesc:
# generic system
mdesc = Machine()
self.readfile = mdesc.script()
self.iobus = Bus(bus_id=0)
self.membus = Bus(bus_id=1)

122
configs/example/fs.py Normal file
View file

@ -0,0 +1,122 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Ali Saidi
import optparse, os, sys
import m5
from m5.objects import *
m5.AddToPath('../common')
from FSConfig import *
from SysPaths import *
from Benchmarks import *
parser = optparse.OptionParser()
parser.add_option("-d", "--detailed", action="store_true")
parser.add_option("-t", "--timing", action="store_true")
parser.add_option("-m", "--maxtick", type="int")
parser.add_option("--maxtime", type="float")
parser.add_option("--dual", action="store_true",
help="Simulate two systems attached with an ethernet link")
parser.add_option("-b", "--benchmark", action="store", type="string",
dest="benchmark",
help="Specify the benchmark to run. Available benchmarks: %s"\
% DefinedBenchmarks)
(options, args) = parser.parse_args()
if args:
print "Error: script doesn't take any positional arguments"
sys.exit(1)
if options.detailed:
cpu = DetailedO3CPU()
cpu2 = DetailedO3CPU()
mem_mode = 'timing'
elif options.timing:
cpu = TimingSimpleCPU()
cpu2 = TimingSimpleCPU()
mem_mode = 'timing'
else:
cpu = AtomicSimpleCPU()
cpu2 = AtomicSimpleCPU()
mem_mode = 'atomic'
cpu.clock = '2GHz'
cpu2.clock = '2GHz'
if options.benchmark:
if options.benchmark not in Benchmarks:
print "Error benchmark %s has not been defined." % options.benchmark
print "Valid benchmarks are: %s" % DefinedBenchmarks
sys.exit(1)
bm = Benchmarks[options.benchmark]
else:
if options.dual:
bm = [Machine(), Machine()]
else:
bm = [Machine()]
if len(bm) == 2:
s1 = makeLinuxAlphaSystem(mem_mode, bm[0])
s1.cpu = cpu
cpu.connectMemPorts(s1.membus)
s2 = makeLinuxAlphaSystem(mem_mode, bm[1])
s2.cpu = cpu2
cpu2.connectMemPorts(s2.membus)
root = makeDualRoot(s1, s2)
elif len(bm) == 1:
root = Root(clock = '1THz',
system = makeLinuxAlphaSystem(mem_mode, bm[0]))
root.system.cpu = cpu
cpu.connectMemPorts(root.system.membus)
else:
print "Error I don't know how to create more than 2 systems."
sys.exit(1)
m5.instantiate(root)
#exit_event = m5.simulate(2600000000000)
#if exit_event.getCause() != "user interrupt received":
# m5.checkpoint(root, 'cpt')
# exit_event = m5.simulate(300000000000)
# if exit_event.getCause() != "user interrupt received":
# m5.checkpoint(root, 'cptA')
if options.maxtick:
exit_event = m5.simulate(options.maxtick)
elif options.maxtime:
simtime = int(options.maxtime * root.clock.value)
print "simulating for: ", simtime
exit_event = m5.simulate(simtime)
else:
exit_event = m5.simulate()
print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause()

116
configs/example/se.py Normal file
View file

@ -0,0 +1,116 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
# Simple test script
#
# "m5 test.py"
import m5
from m5.objects import *
import os, optparse, sys
m5.AddToPath('../common')
from FullO3Config import *
parser = optparse.OptionParser()
parser.add_option("-c", "--cmd",
default="../../tests/test-progs/hello/bin/alpha/linux/hello",
help="The binary to run in syscall emulation mode.")
parser.add_option("-o", "--options", default="",
help="The options to pass to the binary, use \" \" around the entire\
string.")
parser.add_option("-i", "--input", default="",
help="A file of input to give to the binary.")
parser.add_option("-d", "--detailed", action="store_true")
parser.add_option("-t", "--timing", action="store_true")
parser.add_option("-m", "--maxtick", type="int")
(options, args) = parser.parse_args()
if args:
print "Error: script doesn't take any positional arguments"
sys.exit(1)
process = LiveProcess()
process.executable = options.cmd
process.cmd = options.cmd + " " + options.options
if options.input != "":
process.input = options.input
if options.detailed:
#check for SMT workload
workloads = options.cmd.split(';')
if len(workloads) > 1:
process = []
smt_idx = 0
inputs = []
if options.input != "":
inputs = options.input.split(';')
for wrkld in workloads:
smt_process = LiveProcess()
smt_process.executable = wrkld
smt_process.cmd = wrkld + " " + options.options
if inputs and inputs[smt_idx]:
smt_process.input = inputs[smt_idx]
process += [smt_process, ]
smt_idx += 1
if options.timing:
cpu = TimingSimpleCPU()
elif options.detailed:
cpu = DetailedO3CPU()
else:
cpu = AtomicSimpleCPU()
cpu.workload = process
system = System(cpu = cpu,
physmem = PhysicalMemory(),
membus = Bus())
system.physmem.port = system.membus.port
system.cpu.connectMemPorts(system.membus)
root = Root(system = system)
if options.timing or options.detailed:
root.system.mem_mode = 'timing'
# instantiate configuration
m5.instantiate(root)
# simulate until program terminates
if options.maxtick:
exit_event = m5.simulate(options.maxtick)
else:
exit_event = m5.simulate()
print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()

93
configs/test/fs.py
View file

@ -1,93 +0,0 @@
import optparse, os, sys
import m5
from m5.objects import *
m5.AddToPath('../common')
from FSConfig import *
from SysPaths import *
from Benchmarks import *
parser = optparse.OptionParser()
parser.add_option("-d", "--detailed", action="store_true")
parser.add_option("-t", "--timing", action="store_true")
parser.add_option("-m", "--maxtick", type="int")
parser.add_option("--maxtime", type="float")
parser.add_option("--dual", action="store_true",
help="Simulate two systems attached with an ethernet link")
parser.add_option("-b", "--benchmark", action="store", type="string",
dest="benchmark",
help="Specify the benchmark to run. Available benchmarks: %s"\
% DefinedBenchmarks)
(options, args) = parser.parse_args()
if args:
print "Error: script doesn't take any positional arguments"
sys.exit(1)
if options.detailed:
cpu = DetailedO3CPU()
cpu2 = DetailedO3CPU()
mem_mode = 'timing'
elif options.timing:
cpu = TimingSimpleCPU()
cpu2 = TimingSimpleCPU()
mem_mode = 'timing'
else:
cpu = AtomicSimpleCPU()
cpu2 = AtomicSimpleCPU()
mem_mode = 'atomic'
if options.benchmark:
if options.benchmark not in Benchmarks:
print "Error benchmark %s has not been defined." % options.benchmark
print "Valid benchmarks are: %s" % DefinedBenchmarks
sys.exit(1)
bm = Benchmarks[options.benchmark]
if len(bm) == 2:
s1 = makeLinuxAlphaSystem(mem_mode, bm[0])
s2 = makeLinuxAlphaSystem(mem_mode, bm[1])
cpu.connectMemPorts(s1.membus)
cpu2.connectMemPorts(s2.membus)
root = makeDualRoot(s1, s2)
elif len(bm) == 1:
root = Root(clock = '1THz',
system = makeLinuxAlphaSystem(mem_mode, bm[0]))
cpu.connectMemPorts(root.system.membus)
else:
print "Error I don't know how to create more than 2 systems."
sys.exit(1)
else:
if options.dual:
root = makeDualRoot(
makeLinuxAlphaSystem(cpu, mem_mode, Machine()),
makeLinuxAlphaSystem(cpu2, mem_mode, Machine()))
else:
root = Root(clock = '1THz',
system = makeLinuxAlphaSystem(cpu, mem_mode, Machine()))
m5.instantiate(root)
#exit_event = m5.simulate(2600000000000)
#if exit_event.getCause() != "user interrupt received":
# m5.checkpoint(root, 'cpt')
# exit_event = m5.simulate(300000000000)
# if exit_event.getCause() != "user interrupt received":
# m5.checkpoint(root, 'cptA')
if options.maxtick:
exit_event = m5.simulate(options.maxtick)
elif options.maxtime:
simtime = int(options.maxtime * root.clock.value)
print "simulating for: ", simtime
exit_event = m5.simulate(simtime)
else:
exit_event = m5.simulate()
print 'Exiting @ cycle', m5.curTick(), 'because', exit_event.getCause()

83
configs/test/test.py
View file

@ -1,83 +0,0 @@
# Simple test script
#
# Alpha: "m5 test.py"
# MIPS: "m5 test.py -c hello_mips"
import m5
import os, optparse, sys
m5.AddToPath('../common')
from SEConfig import *
from FullO3Config import *
from m5.objects import *
parser = optparse.OptionParser()
parser.add_option("-c", "--cmd", default="hello",
help="The binary to run in syscall emulation mode.")
parser.add_option("-o", "--options", default="",
help="The options to pass to the binary, use \" \" around the entire\
string.")
parser.add_option("-i", "--input", default="",
help="A file of input to give to the binary.")
parser.add_option("-d", "--detailed", action="store_true")
parser.add_option("-t", "--timing", action="store_true")
parser.add_option("-m", "--maxtick", type="int")
(options, args) = parser.parse_args()
if args:
print "Error: script doesn't take any positional arguments"
sys.exit(1)
this_dir = os.path.dirname(__file__)
process = LiveProcess()
process.executable = os.path.join(this_dir, options.cmd)
process.cmd = options.cmd + " " + options.options
if options.input != "":
process.input = options.input
if options.detailed:
#check for SMT workload
workloads = options.cmd.split(';')
if len(workloads) > 1:
process = []
smt_idx = 0
inputs = []
if options.input != "":
inputs = options.input.split(';')
for wrkld in workloads:
smt_process = LiveProcess()
smt_process.executable = os.path.join(this_dir, wrkld)
smt_process.cmd = wrkld + " " + options.options
if inputs and inputs[smt_idx]:
smt_process.input = inputs[smt_idx]
process += [smt_process, ]
smt_idx += 1
if options.timing:
cpu = TimingSimpleCPU()
elif options.detailed:
cpu = DetailedO3CPU()
else:
cpu = AtomicSimpleCPU()
root = MySESystem(cpu, process)
if options.timing or options.detailed:
root.system.mem_mode = 'timing'
# instantiate configuration
m5.instantiate(root)
# simulate until program terminates
if options.maxtick:
exit_event = m5.simulate(options.maxtick)
else:
exit_event = m5.simulate()
print 'Exiting @ tick', m5.curTick(), 'because', exit_event.getCause()

2
src/python/m5/objects/BaseCPU.py
View file

@ -6,7 +6,7 @@ from Bus import Bus
class BaseCPU(SimObject):
type = 'BaseCPU'
abstract = True
mem = Param.MemObject("memory")
mem = Param.PhysicalMemory(Parent.any, "memory")
system = Param.System(Parent.any, "system object")
if build_env['FULL_SYSTEM']:

5
src/sim/process.cc
View file

@ -319,9 +319,8 @@ LiveProcess::argsInit(int intSize, int pageSize)
int space_needed =
argv_array_size + envp_array_size + arg_data_size + env_data_size;
// for SimpleScalar compatibility
if (space_needed < 16384)
space_needed = 16384;
if (space_needed < 32*1024)
space_needed = 32*1024;
// set bottom of stack
stack_min = stack_base - space_needed;

14
tests/SConscript
View file

@ -194,9 +194,21 @@ def test_builder(env, ref_dir):
env.AlwaysBuild(p)
# Figure out applicable configs based on build type
configs = []
if env['FULL_SYSTEM']:
if env['TARGET_ISA'] == 'alpha':
if not env['ALPHA_TLASER']:
configs += ['tsunami-simple-atomic',
'tsunami-simple-timing',
'tsunami-simple-atomic-dual',
'tsunami-simple-timing-dual']
else:
configs += ['simple-atomic', 'simple-timing']
cwd = os.getcwd()
os.chdir(str(Dir('.').srcdir))
for config in ['simple-atomic']:
for config in configs:
dirs = glob.glob('*/*/ref/%s/*/%s' % (env['TARGET_ISA'], config))
for d in dirs:
test_builder(env, d)

38
tests/configs/simple-atomic.py Normal file
View file

@ -0,0 +1,38 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
import m5
from m5.objects import *
system = System(cpu = AtomicSimpleCPU(),
physmem = PhysicalMemory(),
membus = Bus())
system.physmem.port = system.membus.port
system.cpu.connectMemPorts(system.membus)
root = Root(system = system)

49
tests/configs/simple-timing.py Normal file
View file

@ -0,0 +1,49 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
import m5
from m5.objects import *
class MyCache(BaseCache):
assoc = 2
block_size = 64
latency = 1
mshrs = 10
tgts_per_mshr = 5
cpu = TimingSimpleCPU()
cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'),
MyCache(size = '2MB'))
system = System(cpu = cpu,
physmem = PhysicalMemory(),
membus = Bus())
system.physmem.port = system.membus.port
cpu.connectMemPorts(system.membus)
root = Root(system = system)

43
tests/configs/tsunami-simple-atomic-dual.py Normal file
View file

@ -0,0 +1,43 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
import m5
from m5.objects import *
m5.AddToPath('../configs/common')
import FSConfig
AlphaConsole.cpu = Parent.cpu[0]
IntrControl.cpu = Parent.cpu[0]
cpus = [ AtomicSimpleCPU() for i in xrange(2) ]
system = FSConfig.makeLinuxAlphaSystem('atomic')
system.cpu = cpus
for c in cpus:
c.connectMemPorts(system.membus)
root = Root(clock = '2GHz', system = system)

39
tests/configs/tsunami-simple-atomic.py Normal file
View file

@ -0,0 +1,39 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
import m5
from m5.objects import *
m5.AddToPath('../configs/common')
import FSConfig
cpu = AtomicSimpleCPU()
system = FSConfig.makeLinuxAlphaSystem('atomic')
system.cpu = cpu
cpu.connectMemPorts(system.membus)
root = Root(clock = '2GHz', system = system)

43
tests/configs/tsunami-simple-timing-dual.py Normal file
View file

@ -0,0 +1,43 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
import m5
from m5.objects import *
m5.AddToPath('../configs/common')
import FSConfig
AlphaConsole.cpu = Parent.cpu[0]
IntrControl.cpu = Parent.cpu[0]
cpus = [ TimingSimpleCPU() for i in xrange(2) ]
system = FSConfig.makeLinuxAlphaSystem('timing')
system.cpu = cpus
for c in cpus:
c.connectMemPorts(system.membus)
root = Root(clock = '2GHz', system = system)

39
tests/configs/tsunami-simple-timing.py Normal file
View file

@ -0,0 +1,39 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
import m5
from m5.objects import *
m5.AddToPath('../configs/common')
import FSConfig
cpu = TimingSimpleCPU()
system = FSConfig.makeLinuxAlphaSystem('timing')
system.cpu = cpu
cpu.connectMemPorts(system.membus)
root = Root(clock = '2GHz', system = system)

3
tests/quick/00.hello/test.py
View file

@ -26,4 +26,5 @@
#
# Authors: Steve Reinhardt
root.system.cpu.workload = LiveProcess(file = binpath('hello'))
root.system.cpu.workload = LiveProcess(cmd = 'hello',
executable = binpath('hello'))

0
tests/linux-mpboot/ref/alpha/atomic/config.ini → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.ini
View file

0
tests/linux-mpboot/ref/alpha/atomic/config.out → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/config.out
View file

0
tests/linux-mpboot/ref/alpha/atomic/console.system.sim_console → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/console.system.sim_console
View file

0
tests/linux-mpboot/ref/alpha/atomic/m5stats.txt → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/m5stats.txt
View file

0
tests/linux-mpboot/ref/alpha/atomic/stderr → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stderr
View file

0
tests/linux-mpboot/ref/alpha/atomic/stdout → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic-dual/stdout
View file

0
tests/linux-boot/ref/alpha/atomic/config.ini → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.ini
View file

0
tests/linux-boot/ref/alpha/atomic/config.out → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/config.out
View file

0
tests/linux-boot/ref/alpha/atomic/console.system.sim_console → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/console.system.sim_console
View file

0
tests/linux-boot/ref/alpha/atomic/m5stats.txt → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/m5stats.txt
View file

0
tests/linux-boot/ref/alpha/atomic/stderr → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stderr
View file

0
tests/linux-boot/ref/alpha/atomic/stdout → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-atomic/stdout
View file

0
tests/linux-mpboot/ref/alpha/timing/config.ini → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.ini
View file

0
tests/linux-mpboot/ref/alpha/timing/config.out → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/config.out
View file

0
tests/linux-mpboot/ref/alpha/timing/console.system.sim_console → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/console.system.sim_console
View file

0
tests/linux-mpboot/ref/alpha/timing/m5stats.txt → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/m5stats.txt
View file

0
tests/linux-mpboot/ref/alpha/timing/stderr → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stderr
View file

0
tests/linux-mpboot/ref/alpha/timing/stdout → tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing-dual/stdout
View file

520
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.ini Normal file
View file

@ -0,0 +1,520 @@
[root]
type=Root
children=system
checkpoint=
clock=2000000000
max_tick=0
output_file=cout
progress_interval=0
[debug]
break_cycles=
[exetrace]
intel_format=false
pc_symbol=true
print_cpseq=false
print_cycle=true
print_data=true
print_effaddr=true
print_fetchseq=false
print_iregs=false
print_opclass=true
print_thread=true
speculative=true
trace_system=client
[serialize]
count=10
cycle=0
dir=cpt.%012d
period=0
[stats]
descriptions=true
dump_cycle=0
dump_period=0
dump_reset=false
ignore_events=
mysql_db=
mysql_host=
mysql_password=
mysql_user=
project_name=test
simulation_name=test
simulation_sample=0
text_compat=true
text_file=m5stats.txt
[system]
type=LinuxAlphaSystem
children=bridge cpu disk0 disk2 intrctrl iobus membus physmem sim_console simple_disk tsunami
boot_cpu_frequency=1
boot_osflags=root=/dev/hda1 console=ttyS0
console=/dist/m5/system/binaries/console
init_param=0
kernel=/dist/m5/system/binaries/vmlinux
mem_mode=timing
pal=/dist/m5/system/binaries/ts_osfpal
physmem=system.physmem
readfile=tests/halt.sh
system_rev=1024
system_type=34
[system.bridge]
type=Bridge
delay=0
queue_size_a=16
queue_size_b=16
write_ack=false
[system.cpu]
type=TimingSimpleCPU
children=dtb itb
clock=1
cpu_id=-1
defer_registration=false
dtb=system.cpu.dtb
function_trace=false
function_trace_start=0
itb=system.cpu.itb
max_insts_all_threads=0
max_insts_any_thread=0
max_loads_all_threads=0
max_loads_any_thread=0
mem=system.physmem
profile=0
system=system
[system.cpu.dtb]
type=AlphaDTB
size=64
[system.cpu.itb]
type=AlphaITB
size=48
[system.disk0]
type=IdeDisk
children=image
delay=2000
driveID=master
image=system.disk0.image
[system.disk0.image]
type=CowDiskImage
children=child
child=system.disk0.image.child
read_only=false
table_size=65536
[system.disk0.image.child]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.disk2]
type=IdeDisk
children=image
delay=2000
driveID=master
image=system.disk2.image
[system.disk2.image]
type=CowDiskImage
children=child
child=system.disk2.image.child
read_only=false
table_size=65536
[system.disk2.image.child]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-bigswap2.img
read_only=true
[system.intrctrl]
type=IntrControl
cpu=system.cpu
[system.iobus]
type=Bus
bus_id=0
[system.membus]
type=Bus
bus_id=1
[system.physmem]
type=PhysicalMemory
file=
latency=1
range=0:134217727
[system.sim_console]
type=SimConsole
children=listener
append_name=true
intr_control=system.intrctrl
listener=system.sim_console.listener
number=0
output=console
[system.sim_console.listener]
type=ConsoleListener
port=3456
[system.simple_disk]
type=SimpleDisk
children=disk
disk=system.simple_disk.disk
system=system
[system.simple_disk.disk]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.tsunami]
type=Tsunami
children=cchip console etherint ethernet fake_OROM fake_ata0 fake_ata1 fake_pnp_addr fake_pnp_read0 fake_pnp_read1 fake_pnp_read2 fake_pnp_read3 fake_pnp_read4 fake_pnp_read5 fake_pnp_read6 fake_pnp_read7 fake_pnp_write fake_ppc fake_sm_chip fake_uart1 fake_uart2 fake_uart3 fake_uart4 fb ide io pchip pciconfig uart
intrctrl=system.intrctrl
system=system
[system.tsunami.cchip]
type=TsunamiCChip
pio_addr=8803072344064
pio_latency=2
platform=system.tsunami
system=system
tsunami=system.tsunami
[system.tsunami.console]
type=AlphaConsole
cpu=system.cpu
disk=system.simple_disk
pio_addr=8804682956800
pio_latency=2
platform=system.tsunami
sim_console=system.sim_console
system=system
[system.tsunami.etherint]
type=NSGigEInt
device=system.tsunami.ethernet
peer=Null
[system.tsunami.ethernet]
type=NSGigE
children=configdata
clock=0
config_latency=40
configdata=system.tsunami.ethernet.configdata
dma_data_free=false
dma_desc_free=false
dma_no_allocate=true
dma_read_delay=0
dma_read_factor=0
dma_write_delay=0
dma_write_factor=0
hardware_address=00:90:00:00:00:01
intr_delay=20000
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=2
platform=system.tsunami
rss=false
rx_delay=2000
rx_fifo_size=524288
rx_filter=true
rx_thread=false
system=system
tx_delay=2000
tx_fifo_size=524288
tx_thread=false
[system.tsunami.ethernet.configdata]
type=PciConfigData
BAR0=1
BAR0Size=256
BAR1=0
BAR1Size=4096
BAR2=0
BAR2Size=0
BAR3=0
BAR3Size=0
BAR4=0
BAR4Size=0
BAR5=0
BAR5Size=0
BIST=0
CacheLineSize=0
CardbusCIS=0
ClassCode=2
Command=0
DeviceID=34
ExpansionROM=0
HeaderType=0
InterruptLine=30
InterruptPin=1
LatencyTimer=0
MaximumLatency=52
MinimumGrant=176
ProgIF=0
Revision=0
Status=656
SubClassCode=0
SubsystemID=0
SubsystemVendorID=0
VendorID=4107
[system.tsunami.fake_OROM]
type=IsaFake
pio_addr=8796093677568
pio_latency=2
pio_size=393216
platform=system.tsunami
system=system
[system.tsunami.fake_ata0]
type=IsaFake
pio_addr=8804615848432
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_ata1]
type=IsaFake
pio_addr=8804615848304
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_addr]
type=IsaFake
pio_addr=8804615848569
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read0]
type=IsaFake
pio_addr=8804615848451
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read1]
type=IsaFake
pio_addr=8804615848515
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read2]
type=IsaFake
pio_addr=8804615848579
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read3]
type=IsaFake
pio_addr=8804615848643
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read4]
type=IsaFake
pio_addr=8804615848707
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read5]
type=IsaFake
pio_addr=8804615848771
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read6]
type=IsaFake
pio_addr=8804615848835
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read7]
type=IsaFake
pio_addr=8804615848899
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_write]
type=IsaFake
pio_addr=8804615850617
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_ppc]
type=IsaFake
pio_addr=8804615848892
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_sm_chip]
type=IsaFake
pio_addr=8804615848816
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_uart1]
type=IsaFake
pio_addr=8804615848696
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_uart2]
type=IsaFake
pio_addr=8804615848936
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_uart3]
type=IsaFake
pio_addr=8804615848680
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_uart4]
type=IsaFake
pio_addr=8804615848944
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fb]
type=BadDevice
devicename=FrameBuffer
pio_addr=8804615848912
pio_latency=2
platform=system.tsunami
system=system
[system.tsunami.ide]
type=IdeController
children=configdata
config_latency=40
configdata=system.tsunami.ide.configdata
disks=system.disk0 system.disk2
pci_bus=0
pci_dev=0
pci_func=0
pio_latency=2
platform=system.tsunami
system=system
[system.tsunami.ide.configdata]
type=PciConfigData
BAR0=1
BAR0Size=8
BAR1=1
BAR1Size=4
BAR2=1
BAR2Size=8
BAR3=1
BAR3Size=4
BAR4=1
BAR4Size=16
BAR5=1
BAR5Size=0
BIST=0
CacheLineSize=0
CardbusCIS=0
ClassCode=1
Command=0
DeviceID=28945
ExpansionROM=0
HeaderType=0
InterruptLine=31
InterruptPin=1
LatencyTimer=0
MaximumLatency=0
MinimumGrant=0
ProgIF=133
Revision=0
Status=640
SubClassCode=1
SubsystemID=0
SubsystemVendorID=0
VendorID=32902
[system.tsunami.io]
type=TsunamiIO
frequency=1953125
pio_addr=8804615847936
pio_latency=2
platform=system.tsunami
system=system
time=1136073600
tsunami=system.tsunami
[system.tsunami.pchip]
type=TsunamiPChip
pio_addr=8802535473152
pio_latency=2
platform=system.tsunami
system=system
tsunami=system.tsunami
[system.tsunami.pciconfig]
type=PciConfigAll
bus=0
pio_latency=1
platform=system.tsunami
size=16777216
system=system
[system.tsunami.uart]
type=Uart8250
pio_addr=8804615848952
pio_latency=2
platform=system.tsunami
sim_console=system.sim_console
system=system
[trace]
bufsize=0
dump_on_exit=false
file=cout
flags=
ignore=
start=0

515
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/config.out Normal file
View file

@ -0,0 +1,515 @@
[root]
type=Root
clock=2000000000
max_tick=0
progress_interval=0
output_file=cout
[system.physmem]
type=PhysicalMemory
file=
range=[0,134217727]
latency=1
[system]
type=LinuxAlphaSystem
boot_cpu_frequency=1
physmem=system.physmem
mem_mode=timing
kernel=/dist/m5/system/binaries/vmlinux
console=/dist/m5/system/binaries/console
pal=/dist/m5/system/binaries/ts_osfpal
boot_osflags=root=/dev/hda1 console=ttyS0
readfile=tests/halt.sh
init_param=0
system_type=34
system_rev=1024
[system.membus]
type=Bus
bus_id=1
[system.bridge]
type=Bridge
queue_size_a=16
queue_size_b=16
delay=0
write_ack=false
[system.disk0.image.child]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.disk0.image]
type=CowDiskImage
child=system.disk0.image.child
image_file=
table_size=65536
read_only=false
[system.disk0]
type=IdeDisk
image=system.disk0.image
driveID=master
delay=2000
[system.disk2.image.child]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-bigswap2.img
read_only=true
[system.disk2.image]
type=CowDiskImage
child=system.disk2.image.child
image_file=
table_size=65536
read_only=false
[system.disk2]
type=IdeDisk
image=system.disk2.image
driveID=master
delay=2000
[system.cpu.itb]
type=AlphaITB
size=48
[system.cpu.dtb]
type=AlphaDTB
size=64
[system.cpu]
type=TimingSimpleCPU
max_insts_any_thread=0
max_insts_all_threads=0
max_loads_any_thread=0
max_loads_all_threads=0
mem=system.physmem
system=system
itb=system.cpu.itb
dtb=system.cpu.dtb
cpu_id=-1
profile=0
clock=1
defer_registration=false
// width not specified
function_trace=false
function_trace_start=0
// simulate_stalls not specified
[system.intrctrl]
type=IntrControl
cpu=system.cpu
[system.simple_disk.disk]
type=RawDiskImage
image_file=/dist/m5/system/disks/linux-latest.img
read_only=true
[system.simple_disk]
type=SimpleDisk
system=system
disk=system.simple_disk.disk
[system.tsunami]
type=Tsunami
system=system
intrctrl=system.intrctrl
[system.tsunami.fake_uart1]
type=IsaFake
pio_addr=8804615848696
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_uart2]
type=IsaFake
pio_addr=8804615848936
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_uart3]
type=IsaFake
pio_addr=8804615848680
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_uart4]
type=IsaFake
pio_addr=8804615848944
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_ppc]
type=IsaFake
pio_addr=8804615848892
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.cchip]
type=TsunamiCChip
pio_addr=8803072344064
pio_latency=2
platform=system.tsunami
system=system
tsunami=system.tsunami
[system.tsunami.io]
type=TsunamiIO
pio_addr=8804615847936
pio_latency=2
frequency=1953125
platform=system.tsunami
system=system
time=1136073600
tsunami=system.tsunami
[]
type=PciConfigAll
pio_latency=1
bus=0
size=16777216
platform=system.tsunami
system=system
[system.sim_console.listener]
type=ConsoleListener
port=3456
[system.sim_console]
type=SimConsole
listener=system.sim_console.listener
intr_control=system.intrctrl
output=console
append_name=true
number=0
[system.tsunami.console]
type=AlphaConsole
sim_console=system.sim_console
disk=system.simple_disk
pio_addr=8804682956800
system=system
cpu=system.cpu
platform=system.tsunami
pio_latency=2
[system.tsunami.fake_ata1]
type=IsaFake
pio_addr=8804615848304
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_ata0]
type=IsaFake
pio_addr=8804615848432
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.pchip]
type=TsunamiPChip
pio_addr=8802535473152
pio_latency=2
platform=system.tsunami
system=system
tsunami=system.tsunami
[system.tsunami.fake_pnp_read3]
type=IsaFake
pio_addr=8804615848643
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read2]
type=IsaFake
pio_addr=8804615848579
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read1]
type=IsaFake
pio_addr=8804615848515
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read0]
type=IsaFake
pio_addr=8804615848451
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read7]
type=IsaFake
pio_addr=8804615848899
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read6]
type=IsaFake
pio_addr=8804615848835
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read5]
type=IsaFake
pio_addr=8804615848771
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_read4]
type=IsaFake
pio_addr=8804615848707
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_write]
type=IsaFake
pio_addr=8804615850617
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fb]
type=BadDevice
devicename=FrameBuffer
pio_addr=8804615848912
system=system
platform=system.tsunami
pio_latency=2
[system.tsunami.ethernet.configdata]
type=PciConfigData
VendorID=4107
DeviceID=34
Command=0
Status=656
Revision=0
ProgIF=0
SubClassCode=0
ClassCode=2
CacheLineSize=0
LatencyTimer=0
HeaderType=0
BIST=0
BAR0=1
BAR1=0
BAR2=0
BAR3=0
BAR4=0
BAR5=0
CardbusCIS=0
SubsystemVendorID=0
SubsystemID=0
ExpansionROM=0
InterruptLine=30
InterruptPin=1
MinimumGrant=176
MaximumLatency=52
BAR0Size=256
BAR1Size=4096
BAR2Size=0
BAR3Size=0
BAR4Size=0
BAR5Size=0
[system.tsunami.ethernet]
type=NSGigE
system=system
platform=system.tsunami
configdata=system.tsunami.ethernet.configdata
pci_bus=0
pci_dev=1
pci_func=0
pio_latency=2
config_latency=40
clock=0
dma_desc_free=false
dma_data_free=false
dma_read_delay=0
dma_write_delay=0
dma_read_factor=0
dma_write_factor=0
dma_no_allocate=true
intr_delay=20000
rx_delay=2000
tx_delay=2000
rx_fifo_size=524288
tx_fifo_size=524288
rx_filter=true
hardware_address=00:90:00:00:00:01
rx_thread=false
tx_thread=false
rss=false
[system.tsunami.etherint]
type=NSGigEInt
peer=null
device=system.tsunami.ethernet
[system.tsunami.fake_OROM]
type=IsaFake
pio_addr=8796093677568
pio_latency=2
pio_size=393216
platform=system.tsunami
system=system
[system.tsunami.uart]
type=Uart8250
pio_addr=8804615848952
pio_latency=2
platform=system.tsunami
sim_console=system.sim_console
system=system
[system.tsunami.fake_sm_chip]
type=IsaFake
pio_addr=8804615848816
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.fake_pnp_addr]
type=IsaFake
pio_addr=8804615848569
pio_latency=2
pio_size=8
platform=system.tsunami
system=system
[system.tsunami.ide.configdata]
type=PciConfigData
VendorID=32902
DeviceID=28945
Command=0
Status=640
Revision=0
ProgIF=133
SubClassCode=1
ClassCode=1
CacheLineSize=0
LatencyTimer=0
HeaderType=0
BIST=0
BAR0=1
BAR1=1
BAR2=1
BAR3=1
BAR4=1
BAR5=1
CardbusCIS=0
SubsystemVendorID=0
SubsystemID=0
ExpansionROM=0
InterruptLine=31
InterruptPin=1
MinimumGrant=0
MaximumLatency=0
BAR0Size=8
BAR1Size=4
BAR2Size=8
BAR3Size=4
BAR4Size=16
BAR5Size=0
[system.tsunami.ide]
type=IdeController
system=system
platform=system.tsunami
configdata=system.tsunami.ide.configdata
pci_bus=0
pci_dev=0
pci_func=0
pio_latency=2
config_latency=40
disks=system.disk0 system.disk2
[system.iobus]
type=Bus
bus_id=0
[trace]
flags=
start=0
bufsize=0
file=cout
dump_on_exit=false
ignore=
[stats]
descriptions=true
project_name=test
simulation_name=test
simulation_sample=0
text_file=m5stats.txt
text_compat=true
mysql_db=
mysql_user=
mysql_password=
mysql_host=
events_start=-1
dump_reset=false
dump_cycle=0
dump_period=0
ignore_events=
[random]
seed=1
[exetrace]
speculative=true
print_cycle=true
print_opclass=true
print_thread=true
print_effaddr=true
print_data=true
print_iregs=false
print_fetchseq=false
print_cpseq=false
print_reg_delta=false
pc_symbol=true
intel_format=false
trace_system=client
[debug]
break_cycles=
[pseudo_inst]
quiesce=true
statistics=true
checkpoint=true

106
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/console.system.sim_console Normal file
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@ -0,0 +1,106 @@
M5 console: m5AlphaAccess @ 0xFFFFFD0200000000
Got Configuration 623
memsize 8000000 pages 4000
First free page after ROM 0xFFFFFC0000018000
HWRPB 0xFFFFFC0000018000 l1pt 0xFFFFFC0000040000 l2pt 0xFFFFFC0000042000 l3pt_rpb 0xFFFFFC0000044000 l3pt_kernel 0xFFFFFC0000048000 l2reserv 0xFFFFFC0000046000
kstart = 0xFFFFFC0000310000, kend = 0xFFFFFC00008064E8, kentry = 0xFFFFFC0000310000, numCPUs = 0x1
CPU Clock at 2000 MHz IntrClockFrequency=1024
Booting with 1 processor(s)
KSP: 0x20043FE8 PTBR 0x20
Console Callback at 0x0, fixup at 0x0, crb offset: 0x510
Memory cluster 0 [0 - 392]
Memory cluster 1 [392 - 15992]
Initalizing mdt_bitmap addr 0xFFFFFC0000038000 mem_pages 4000
ConsoleDispatch at virt 10000658 phys 18658 val FFFFFC00000100A8
unix_boot_mem ends at FFFFFC0000076000
k_argc = 0
jumping to kernel at 0xFFFFFC0000310000, (PCBB 0xFFFFFC0000018180 pfn 1028)
CallbackFixup 0 18000, t7=FFFFFC0000700000
Linux version 2.6.8.1 (binkertn@ziff.eecs.umich.edu) (gcc version 3.4.3) #36 SMP Mon May 2 19:50:53 EDT 2005
Booting GENERIC on Tsunami variation DP264 using machine vector DP264 from SRM
Major Options: SMP LEGACY_START VERBOSE_MCHECK
Command line: root=/dev/hda1 console=ttyS0
memcluster 0, usage 1, start 0, end 392
memcluster 1, usage 0, start 392, end 16384
freeing pages 1030:16384
reserving pages 1030:1031
SMP: 1 CPUs probed -- cpu_present_mask = 1
Built 1 zonelists
Kernel command line: root=/dev/hda1 console=ttyS0
PID hash table entries: 1024 (order 10: 16384 bytes)
Using epoch = 1900
Console: colour dummy device 80x25
Dentry cache hash table entries: 32768 (order: 5, 262144 bytes)
Inode-cache hash table entries: 16384 (order: 4, 131072 bytes)
Memory: 119072k/131072k available (3058k kernel code, 8680k reserved, 695k data, 480k init)
Mount-cache hash table entries: 512 (order: 0, 8192 bytes)
per-CPU timeslice cutoff: 374.49 usecs.
task migration cache decay timeout: 0 msecs.
SMP mode deactivated.
Brought up 1 CPUs
SMP: Total of 1 processors activated (4002.20 BogoMIPS).
NET: Registered protocol family 16
EISA bus registered
pci: enabling save/restore of SRM state
SCSI subsystem initialized
srm_env: version 0.0.5 loaded successfully
Installing knfsd (copyright (C) 1996 okir@monad.swb.de).
Initializing Cryptographic API
rtc: Standard PC (1900) epoch (1900) detected
Real Time Clock Driver v1.12
Serial: 8250/16550 driver $Revision: 1.90 $ 5 ports, IRQ sharing disabled
ttyS0 at I/O 0x3f8 (irq = 4) is a 8250
loop: loaded (max 8 devices)
Using anticipatory io scheduler
nbd: registered device at major 43
sinic.c: M5 Simple Integrated NIC driver
ns83820.c: National Semiconductor DP83820 10/100/1000 driver.
eth0: ns83820.c: 0x22c: 00000000, subsystem: 0000:0000
eth0: enabling optical transceiver
eth0: ns83820 v0.20: DP83820 v1.3: 00:90:00:00:00:01 io=0x09000000 irq=30 f=sg
Uniform Multi-Platform E-IDE driver Revision: 7.00alpha2
ide: Assuming 33MHz system bus speed for PIO modes; override with idebus=xx
PIIX4: IDE controller at PCI slot 0000:00:00.0
PIIX4: chipset revision 0
PIIX4: 100% native mode on irq 31
ide0: BM-DMA at 0x8400-0x8407, BIOS settings: hda:DMA, hdb:DMA
ide1: BM-DMA at 0x8408-0x840f, BIOS settings: hdc:DMA, hdd:DMA
hda: M5 IDE Disk, ATA DISK drive
hdb: M5 IDE Disk, ATA DISK drive
ide0 at 0x8410-0x8417,0x8422 on irq 31
hda: max request size: 128KiB
hda: 163296 sectors (83 MB), CHS=162/16/63, UDMA(33)
hda: hda1
hdb: max request size: 128KiB
hdb: 4177920 sectors (2139 MB), CHS=4144/16/63, UDMA(33)
hdb: unknown partition table
scsi0 : scsi_m5, version 1.73 [20040518], dev_size_mb=8, opts=0x0
Vendor: Linux Model: scsi_m5 Li Rev: 0004
Type: Direct-Access ANSI SCSI revision: 03
SCSI device sda: 16384 512-byte hdwr sectors (8 MB)
SCSI device sda: drive cache: write back
sda: unknown partition table
Attached scsi disk sda at scsi0, channel 0, id 0, lun 0
mice: PS/2 mouse device common for all mice
NET: Registered protocol family 2
IP: routing cache hash table of 1024 buckets, 16Kbytes
TCP: Hash tables configured (established 8192 bind 8192)
ip_conntrack version 2.1 (512 buckets, 4096 max) - 440 bytes per conntrack
ip_tables: (C) 2000-2002 Netfilter core team
arp_tables: (C) 2002 David S. Miller
Initializing IPsec netlink socket
NET: Registered protocol family 1
NET: Registered protocol family 17
NET: Registered protocol family 15
Bridge firewalling registered
802.1Q VLAN Support v1.8 Ben Greear <greearb@candelatech.com>
All bugs added by David S. Miller <davem@redhat.com>
VFS: Mounted root (ext2 filesystem) readonly.
Freeing unused kernel memory: 480k freed
init started: BusyBox v1.00-rc2 (2004.11.18-16:22+0000) multi-call binary
PTXdist-0.7.0 (2004-11-18T11:23:40-0500)
mounting filesystems...
EXT2-fs warning: checktime reached, running e2fsck is recommended
loading script...

166
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/m5stats.txt Normal file
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---------- Begin Simulation Statistics ----------
host_inst_rate 864969 # Simulator instruction rate (inst/s)
host_mem_usage 194104 # Number of bytes of host memory used
host_seconds 69.27 # Real time elapsed on the host
host_tick_rate 50617416 # Simulator tick rate (ticks/s)
sim_freq 2000000000 # Frequency of simulated ticks
sim_insts 59915182 # Number of instructions simulated
sim_seconds 1.753109 # Number of seconds simulated
sim_ticks 3506218170 # Number of ticks simulated
system.cpu.dtb.accesses 2354955 # DTB accesses
system.cpu.dtb.acv 413 # DTB access violations
system.cpu.dtb.hits 13926686 # DTB hits
system.cpu.dtb.misses 16187 # DTB misses
system.cpu.dtb.read_accesses 832415 # DTB read accesses
system.cpu.dtb.read_acv 242 # DTB read access violations
system.cpu.dtb.read_hits 7716658 # DTB read hits
system.cpu.dtb.read_misses 13695 # DTB read misses
system.cpu.dtb.write_accesses 1522540 # DTB write accesses
system.cpu.dtb.write_acv 171 # DTB write access violations
system.cpu.dtb.write_hits 6210028 # DTB write hits
system.cpu.dtb.write_misses 2492 # DTB write misses
system.cpu.idle_fraction 0.978925 # Percentage of idle cycles
system.cpu.itb.accesses 4037381 # ITB accesses
system.cpu.itb.acv 239 # ITB acv
system.cpu.itb.hits 4030657 # ITB hits
system.cpu.itb.misses 6724 # ITB misses
system.cpu.kern.callpal 183644 # number of callpals executed
system.cpu.kern.callpal_cserve 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal_wrmces 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal_wrfen 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal_wrvptptr 1 0.00% 0.00% # number of callpals executed
system.cpu.kern.callpal_swpctx 1861 1.01% 1.02% # number of callpals executed
system.cpu.kern.callpal_tbi 28 0.02% 1.03% # number of callpals executed
system.cpu.kern.callpal_wrent 7 0.00% 1.03% # number of callpals executed
system.cpu.kern.callpal_swpipl 171635 93.46% 94.50% # number of callpals executed
system.cpu.kern.callpal_rdps 4808 2.62% 97.11% # number of callpals executed
system.cpu.kern.callpal_wrkgp 1 0.00% 97.11% # number of callpals executed
system.cpu.kern.callpal_wrusp 8 0.00% 97.12% # number of callpals executed
system.cpu.kern.callpal_rdusp 12 0.01% 97.12% # number of callpals executed
system.cpu.kern.callpal_whami 2 0.00% 97.13% # number of callpals executed
system.cpu.kern.callpal_rti 4297 2.34% 99.47% # number of callpals executed
system.cpu.kern.callpal_callsys 667 0.36% 99.83% # number of callpals executed
system.cpu.kern.callpal_imb 314 0.17% 100.00% # number of callpals executed
system.cpu.kern.inst.arm 0 # number of arm instructions executed
system.cpu.kern.inst.hwrei 209285 # number of hwrei instructions executed
system.cpu.kern.inst.ivlb 0 # number of ivlb instructions executed
system.cpu.kern.inst.ivle 0 # number of ivle instructions executed
system.cpu.kern.inst.quiesce 1867 # number of quiesce instructions executed
system.cpu.kern.ipl_count 178009 # number of times we switched to this ipl
system.cpu.kern.ipl_count_0 75254 42.28% 42.28% # number of times we switched to this ipl
system.cpu.kern.ipl_count_21 286 0.16% 42.44% # number of times we switched to this ipl
system.cpu.kern.ipl_count_22 5465 3.07% 45.51% # number of times we switched to this ipl
system.cpu.kern.ipl_count_31 97004 54.49% 100.00% # number of times we switched to this ipl
system.cpu.kern.ipl_good 159802 # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good_0 75188 47.05% 47.05% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good_21 286 0.18% 47.23% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good_22 5465 3.42% 50.65% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_good_31 78863 49.35% 100.00% # number of times we switched to this ipl from a different ipl
system.cpu.kern.ipl_ticks 3506217640 # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks_0 3478896122 99.22% 99.22% # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks_21 60705 0.00% 99.22% # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks_22 1274059 0.04% 99.26% # number of cycles we spent at this ipl
system.cpu.kern.ipl_ticks_31 25986754 0.74% 100.00% # number of cycles we spent at this ipl
system.cpu.kern.ipl_used 0.897719 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used_0 0.999123 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used_21 1 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used_22 1 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.ipl_used_31 0.812987 # fraction of swpipl calls that actually changed the ipl
system.cpu.kern.mode_good_kernel 2339
system.cpu.kern.mode_good_user 2168
system.cpu.kern.mode_good_idle 171
system.cpu.kern.mode_switch_kernel 4093 # number of protection mode switches
system.cpu.kern.mode_switch_user 2168 # number of protection mode switches
system.cpu.kern.mode_switch_idle 2043 # number of protection mode switches
system.cpu.kern.mode_switch_good 0.563343 # fraction of useful protection mode switches
system.cpu.kern.mode_switch_good_kernel 0.571463 # fraction of useful protection mode switches
system.cpu.kern.mode_switch_good_user 1 # fraction of useful protection mode switches
system.cpu.kern.mode_switch_good_idle 0.083700 # fraction of useful protection mode switches
system.cpu.kern.mode_ticks_kernel 40644475 1.16% 1.16% # number of ticks spent at the given mode
system.cpu.kern.mode_ticks_user 5527486 0.16% 1.32% # number of ticks spent at the given mode
system.cpu.kern.mode_ticks_idle 3460045677 98.68% 100.00% # number of ticks spent at the given mode
system.cpu.kern.swap_context 1862 # number of times the context was actually changed
system.cpu.kern.syscall 475 # number of syscalls executed
system.cpu.kern.syscall_fork 10 2.11% 2.11% # number of syscalls executed
system.cpu.kern.syscall_read 33 6.95% 9.05% # number of syscalls executed
system.cpu.kern.syscall_write 7 1.47% 10.53% # number of syscalls executed
system.cpu.kern.syscall_close 49 10.32% 20.84% # number of syscalls executed
system.cpu.kern.syscall_chdir 1 0.21% 21.05% # number of syscalls executed
system.cpu.kern.syscall_chmod 1 0.21% 21.26% # number of syscalls executed
system.cpu.kern.syscall_obreak 44 9.26% 30.53% # number of syscalls executed
system.cpu.kern.syscall_lseek 13 2.74% 33.26% # number of syscalls executed
system.cpu.kern.syscall_getpid 10 2.11% 35.37% # number of syscalls executed
system.cpu.kern.syscall_setuid 4 0.84% 36.21% # number of syscalls executed
system.cpu.kern.syscall_getuid 8 1.68% 37.89% # number of syscalls executed
system.cpu.kern.syscall_access 4 0.84% 38.74% # number of syscalls executed
system.cpu.kern.syscall_dup 4 0.84% 39.58% # number of syscalls executed
system.cpu.kern.syscall_open 68 14.32% 53.89% # number of syscalls executed
system.cpu.kern.syscall_getgid 8 1.68% 55.58% # number of syscalls executed
system.cpu.kern.syscall_sigprocmask 14 2.95% 58.53% # number of syscalls executed
system.cpu.kern.syscall_ioctl 16 3.37% 61.89% # number of syscalls executed
system.cpu.kern.syscall_readlink 2 0.42% 62.32% # number of syscalls executed
system.cpu.kern.syscall_execve 8 1.68% 64.00% # number of syscalls executed
system.cpu.kern.syscall_pre_F64_stat 31 6.53% 70.53% # number of syscalls executed
system.cpu.kern.syscall_pre_F64_lstat 1 0.21% 70.74% # number of syscalls executed
system.cpu.kern.syscall_mmap 55 11.58% 82.32% # number of syscalls executed
system.cpu.kern.syscall_munmap 6 1.26% 83.58% # number of syscalls executed
system.cpu.kern.syscall_mprotect 14 2.95% 86.53% # number of syscalls executed
system.cpu.kern.syscall_gethostname 2 0.42% 86.95% # number of syscalls executed
system.cpu.kern.syscall_dup2 4 0.84% 87.79% # number of syscalls executed
system.cpu.kern.syscall_pre_F64_fstat 28 5.89% 93.68% # number of syscalls executed
system.cpu.kern.syscall_fcntl 14 2.95% 96.63% # number of syscalls executed
system.cpu.kern.syscall_socket 3 0.63% 97.26% # number of syscalls executed
system.cpu.kern.syscall_connect 3 0.63% 97.89% # number of syscalls executed
system.cpu.kern.syscall_setgid 4 0.84% 98.74% # number of syscalls executed
system.cpu.kern.syscall_getrlimit 3 0.63% 99.37% # number of syscalls executed
system.cpu.kern.syscall_setsid 3 0.63% 100.00% # number of syscalls executed
system.cpu.not_idle_fraction 0.021075 # Percentage of non-idle cycles
system.cpu.numCycles 0 # number of cpu cycles simulated
system.cpu.num_insts 59915182 # Number of instructions executed
system.cpu.num_refs 13979549 # Number of memory references
system.disk0.dma_read_bytes 1024 # Number of bytes transfered via DMA reads (not PRD).
system.disk0.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.disk0.dma_read_txs 1 # Number of DMA read transactions (not PRD).
system.disk0.dma_write_bytes 2521088 # Number of bytes transfered via DMA writes.
system.disk0.dma_write_full_pages 285 # Number of full page size DMA writes.
system.disk0.dma_write_txs 375 # Number of DMA write transactions.
system.disk2.dma_read_bytes 0 # Number of bytes transfered via DMA reads (not PRD).
system.disk2.dma_read_full_pages 0 # Number of full page size DMA reads (not PRD).
system.disk2.dma_read_txs 0 # Number of DMA read transactions (not PRD).
system.disk2.dma_write_bytes 8192 # Number of bytes transfered via DMA writes.
system.disk2.dma_write_full_pages 1 # Number of full page size DMA writes.
system.disk2.dma_write_txs 1 # Number of DMA write transactions.
system.tsunami.ethernet.coalescedRxDesc <err: div-0> # average number of RxDesc's coalesced into each post
system.tsunami.ethernet.coalescedRxIdle <err: div-0> # average number of RxIdle's coalesced into each post
system.tsunami.ethernet.coalescedRxOk <err: div-0> # average number of RxOk's coalesced into each post
system.tsunami.ethernet.coalescedRxOrn <err: div-0> # average number of RxOrn's coalesced into each post
system.tsunami.ethernet.coalescedSwi <err: div-0> # average number of Swi's coalesced into each post
system.tsunami.ethernet.coalescedTotal <err: div-0> # average number of interrupts coalesced into each post
system.tsunami.ethernet.coalescedTxDesc <err: div-0> # average number of TxDesc's coalesced into each post
system.tsunami.ethernet.coalescedTxIdle <err: div-0> # average number of TxIdle's coalesced into each post
system.tsunami.ethernet.coalescedTxOk <err: div-0> # average number of TxOk's coalesced into each post
system.tsunami.ethernet.descDMAReads 0 # Number of descriptors the device read w/ DMA
system.tsunami.ethernet.descDMAWrites 0 # Number of descriptors the device wrote w/ DMA
system.tsunami.ethernet.descDmaReadBytes 0 # number of descriptor bytes read w/ DMA
system.tsunami.ethernet.descDmaWriteBytes 0 # number of descriptor bytes write w/ DMA
system.tsunami.ethernet.droppedPackets 0 # number of packets dropped
system.tsunami.ethernet.postedInterrupts 0 # number of posts to CPU
system.tsunami.ethernet.postedRxDesc 0 # number of RxDesc interrupts posted to CPU
system.tsunami.ethernet.postedRxIdle 0 # number of rxIdle interrupts posted to CPU
system.tsunami.ethernet.postedRxOk 0 # number of RxOk interrupts posted to CPU
system.tsunami.ethernet.postedRxOrn 0 # number of RxOrn posted to CPU
system.tsunami.ethernet.postedSwi 0 # number of software interrupts posted to CPU
system.tsunami.ethernet.postedTxDesc 0 # number of TxDesc interrupts posted to CPU
system.tsunami.ethernet.postedTxIdle 0 # number of TxIdle interrupts posted to CPU
system.tsunami.ethernet.postedTxOk 0 # number of TxOk interrupts posted to CPU
system.tsunami.ethernet.totalRxDesc 0 # total number of RxDesc written to ISR
system.tsunami.ethernet.totalRxIdle 0 # total number of RxIdle written to ISR
system.tsunami.ethernet.totalRxOk 0 # total number of RxOk written to ISR
system.tsunami.ethernet.totalRxOrn 0 # total number of RxOrn written to ISR
system.tsunami.ethernet.totalSwi 0 # total number of Swi written to ISR
system.tsunami.ethernet.totalTxDesc 0 # total number of TxDesc written to ISR
system.tsunami.ethernet.totalTxIdle 0 # total number of TxIdle written to ISR
system.tsunami.ethernet.totalTxOk 0 # total number of TxOk written to ISR
---------- End Simulation Statistics ----------

4
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stderr Normal file
View file

@ -0,0 +1,4 @@
0: system.tsunami.io.rtc: Real-time clock set to Sun Jan 1 00:00:00 2006
Listening for console connection on port 3456
0: system.remote_gdb.listener: listening for remote gdb #0 on port 7000
warn: Entering event queue @ 0. Starting simulation...

12
tests/quick/10.linux-boot/ref/alpha/linux/tsunami-simple-timing/stdout Normal file
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@ -0,0 +1,12 @@
M5 Simulator System
Copyright (c) 2001-2006
The Regents of The University of Michigan
All Rights Reserved
M5 compiled Aug 16 2006 13:33:58
M5 started Wed Aug 16 14:39:26 2006
M5 executing on zizzer.eecs.umich.edu
command line: build/ALPHA_FS/m5.opt -d build/ALPHA_FS/test/opt/quick/10.linux-boot/alpha/linux/tsunami-simple-timing tests/run.py quick/10.linux-boot/alpha/linux/tsunami-simple-timing
Exiting @ tick 3506218170 because m5_exit instruction encountered

29
tests/quick/10.linux-boot/test.py Normal file
View file

@ -0,0 +1,29 @@
# Copyright (c) 2006 The Regents of The University of Michigan
# All rights reserved.
#
# Redistribution and use in source and binary forms, with or without
# modification, are permitted provided that the following conditions are
# met: redistributions of source code must retain the above copyright
# notice, this list of conditions and the following disclaimer;
# redistributions in binary form must reproduce the above copyright
# notice, this list of conditions and the following disclaimer in the
# documentation and/or other materials provided with the distribution;
# neither the name of the copyright holders nor the names of its
# contributors may be used to endorse or promote products derived from
# this software without specific prior written permission.
#
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
#
# Authors: Steve Reinhardt
root.system.readfile = os.path.join(tests_root, 'halt.sh')

3
tests/quick/20.eio-short/test.py
View file

@ -26,5 +26,6 @@
#
# Authors: Steve Reinhardt
root.system.cpu.workload = EioProcess(file = binpath('anagram-vshort.eio.gz'))
root.system.cpu.workload = EioProcess(file = binpath('anagram',
'anagram-vshort.eio.gz'))
root.system.cpu.max_insts_any_thread = 500000

2
tests/run.py
View file

@ -43,7 +43,7 @@ def binpath(app, file=None):
return os.path.join(test_progs, app, 'bin', isa, opsys, file)
# build configuration
execfile(os.path.join(tests_root, config + '.py'))
execfile(os.path.join(tests_root, 'configs', config + '.py'))
# set default maxtick... script can override
# -1 means run forever

12
tests/simple-atomic.py
View file

@ -1,12 +0,0 @@
import m5
from m5.objects import *
m5.AddToPath('../configs/common')
from SEConfig import *
system = System(cpu = AtomicSimpleCPU(),
physmem = PhysicalMemory(),
membus = Bus())
system.physmem.port = system.membus.port
system.cpu.connectMemPorts(system.membus)
root = Root(system = system)

23
tests/simple-timing.py
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@ -1,23 +0,0 @@
import m5
from m5.objects import *
m5.AddToPath('../configs/common')
from SEConfig import *
class MyCache(BaseCache):
assoc = 2
block_size = 64
latency = 1
mshrs = 10
tgts_per_mshr = 5
cpu = TimingSimpleCPU()
cpu.addTwoLevelCacheHierarchy(MyCache(size = '128kB'), MyCache(size = '256kB'),
MyCache(size = '2MB'))
system = System(cpu = cpu,
physmem = PhysicalMemory(),
membus = Bus())
system.physmem.port = system.membus.port
cpu.connectMemPorts(system.membus)
root = Root(system = system)

0
tests/test-progs/hello/bin/mips/linux/hello_mips → tests/test-progs/hello/bin/mips/linux/hello
View file

0
tests/test-progs/hello/bin/sparc/bin → tests/test-progs/hello/bin/sparc/linux/hello
View file