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gem5/tests/quick/02.insttest/ref/sparc/linux/simple-atomic/simout

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tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
M5 Simulator System
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
M5 compiled Feb 16 2009 00:17:12
M5 revision d8c62c2eaaa6 5874 default qtip pf1 tip qbase
M5 started Feb 16 2009 00:17:34
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
2008-11-06 17:11:42 +01:00
M5 executing on zizzer
Update stats for new prefetching fixes. Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
2009-02-16 18:09:45 +01:00
command line: build/SPARC_SE/m5.fast -d build/SPARC_SE/tests/fast/quick/02.insttest/sparc/linux/simple-atomic -re tests/run.py quick/02.insttest/sparc/linux/simple-atomic
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
Global frequency set at 1000000000000 ticks per second
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
2008-11-06 17:11:42 +01:00
info: Entering event queue @ 0. Starting simulation...
Add regression for SPARC "hard" instruction test. Only runs in simple-atomic right now since we don't have cache support for the atomic instructions. --HG-- extra : convert_revision : b7013e6963885dfe2b4630ac175e24ddad6d42a6
2007-03-06 21:57:28 +01:00
Begining test of difficult SPARC instructions...
LDSTUB: Passed
SWAP: Passed
CAS FAIL: Passed
CAS WORK: Passed
CASX FAIL: Passed
CASX WORK: Passed
LDTX: Passed
LDTW: Passed
add to instruction test sttw instruction --HG-- extra : convert_revision : 16efbe12e609a909a589505ad6c473eb44c38f9c
2007-03-29 21:41:09 +02:00
STTW: Passed
Add regression for SPARC "hard" instruction test. Only runs in simple-atomic right now since we don't have cache support for the atomic instructions. --HG-- extra : convert_revision : b7013e6963885dfe2b4630ac175e24ddad6d42a6
2007-03-06 21:57:28 +01:00
Done
regress: update regressions for tty emulation fix.
2008-07-25 01:31:54 +02:00
Exiting @ tick 7618500 because target called exit()
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