2009-05-11 19:38:46 +02:00
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---------- Begin Simulation Statistics ----------
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2012-09-06 03:53:34 +02:00
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sim_seconds 0.008643 # Number of seconds simulated
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sim_ticks 8642753 # Number of ticks simulated
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final_tick 8642753 # Number of ticks from beginning of simulation (restored from checkpoints and never reset)
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2010-01-30 05:29:40 +01:00
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sim_freq 1000000000 # Frequency of simulated ticks
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2012-09-06 03:53:34 +02:00
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host_tick_rate 200801 # Simulator tick rate (ticks/s)
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host_mem_usage 409268 # Number of bytes of host memory used
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host_seconds 43.04 # Real time elapsed on the host
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2012-07-11 07:51:55 +02:00
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system.l1_cntrl4.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl4.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl4.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl4.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl4.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl4.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.l1_cntrl5.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl5.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl5.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl5.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl5.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl5.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.l1_cntrl6.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl6.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl6.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl6.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl6.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl6.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.l1_cntrl7.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl7.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl7.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl7.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl7.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl7.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.l1_cntrl0.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl0.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl0.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl0.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl0.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl0.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.l1_cntrl1.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl1.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl1.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl1.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl1.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl1.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.l1_cntrl2.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl2.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl2.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl2.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl2.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl2.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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system.l1_cntrl3.cacheMemory.num_data_array_reads 0 # number of data array reads
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system.l1_cntrl3.cacheMemory.num_data_array_writes 0 # number of data array writes
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system.l1_cntrl3.cacheMemory.num_tag_array_reads 0 # number of tag array reads
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system.l1_cntrl3.cacheMemory.num_tag_array_writes 0 # number of tag array writes
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system.l1_cntrl3.cacheMemory.num_tag_array_stalls 0 # number of stalls caused by tag array
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system.l1_cntrl3.cacheMemory.num_data_array_stalls 0 # number of stalls caused by data array
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2012-09-06 03:53:34 +02:00
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system.cpu0.num_reads 99336 # number of read accesses completed
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system.cpu0.num_writes 53454 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu0.num_copies 0 # number of copy accesses completed
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2012-09-06 03:53:34 +02:00
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system.cpu1.num_reads 99686 # number of read accesses completed
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system.cpu1.num_writes 53261 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu1.num_copies 0 # number of copy accesses completed
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2012-09-06 03:53:34 +02:00
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system.cpu2.num_reads 99694 # number of read accesses completed
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system.cpu2.num_writes 53721 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu2.num_copies 0 # number of copy accesses completed
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2012-09-06 03:53:34 +02:00
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system.cpu3.num_reads 98699 # number of read accesses completed
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system.cpu3.num_writes 53080 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu3.num_copies 0 # number of copy accesses completed
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2012-09-06 03:53:34 +02:00
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system.cpu4.num_reads 100000 # number of read accesses completed
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system.cpu4.num_writes 54108 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu4.num_copies 0 # number of copy accesses completed
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2012-09-06 03:53:34 +02:00
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system.cpu5.num_reads 99065 # number of read accesses completed
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system.cpu5.num_writes 53284 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu5.num_copies 0 # number of copy accesses completed
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2012-09-06 03:53:34 +02:00
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system.cpu6.num_reads 99678 # number of read accesses completed
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system.cpu6.num_writes 53683 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu6.num_copies 0 # number of copy accesses completed
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2012-09-06 03:53:34 +02:00
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system.cpu7.num_reads 98986 # number of read accesses completed
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system.cpu7.num_writes 53291 # number of write accesses completed
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2009-05-11 19:38:46 +02:00
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system.cpu7.num_copies 0 # number of copy accesses completed
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---------- End Simulation Statistics ----------
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