sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity
gem5/tests/quick/se/00.hello/ref/alpha/linux/simple-timing-ruby/simerr

11 lines
577 B
Text
Raw Normal View History

tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
warn: rounding error > tolerance
stats: Bump for MessageBuffer, cache latency changes
2015-08-14 08:19:34 +02:00
1.250000 rounded to 1
tests: update reference outputs Apparently only stats.txt was updated the last time, so this changeset updates other reference output files (config.ini, simout, simerr, ruby.stats) so that test output diffs should not be cluttered with irrelevant changes. There are a few stats.txt updates too, but they are in the minority.
2013-09-28 21:25:17 +02:00
warn: rounding error > tolerance
stats: Bump for MessageBuffer, cache latency changes
2015-08-14 08:19:34 +02:00
1.250000 rounded to 1
warn: rounding error > tolerance
1.250000 rounded to 1
warn: DRAM device capacity (8192 Mbytes) does not match the address range assigned (256 Mbytes)
ARM/O3: Add regressions for ARM w/ O3 CPU.
2011-01-18 23:30:06 +01:00
warn: Sockets disabled, not accepting gdb connections
stats: update references
2016-10-14 00:21:40 +02:00
warn: ClockedObject: More than one power state change request encountered within the same simulation tick
stats: updates due to recent chagnesets
2015-11-16 12:08:57 +01:00
warn: Replacement policy updates recently became the responsibility of SLICC state machines. Make sure to setMRU() near callbacks in .sm files!
Reference in a new issue Copy permalink