sanchayanmaity/gem5
1
0
Fork 0
Code Issues Pull requests Packages Projects Releases Wiki Activity
gem5/arch/mips/isa/operands.isa

35 lines
1.1 KiB
Plaintext
Raw Normal View History

Some stuff aparently didn't get committed which was from before the new repository was created. SConscript: There is a new SConscript in the arch/alpha directory which has the alpha specific files. To add files for an arch, a similar file should be created. arch/isa_parser.py: The isa parser now supports include directives. These are done with ##include build/SConstruct: The target directory is passed on so that the architecture specific SConscript can have it. Also, sparc was added as a valid architecture type. arch/alpha/SConscript: This SConscript adds the alpha specific source arch/sparc/isa_desc/operands.h: This sets up the operand types that the sparc isa uses arch/sparc/isa_traits.cc: Implementation of sparc specific things, like a register file with windows build/build_options/default/SPARC_SE: The default options for a sparc syscall emulation build. --HG-- extra : convert_revision : 1afedae61dc8cae0d59d3bf1d41420d929be2efd
2006-01-25 01:57:17 +01:00
def operand_types {{
'sb' : ('signed int', 8),
'ub' : ('unsigned int', 8),
load/store instruction format ... now generates load/store code and breaks it into a separate EA and MemAccess templated from how the Alpha ARch. was coded to do the same thing. arch/mips/isa/bitfields.isa: comment change arch/mips/isa/decoder.isa: re-structuring of load/store instruction definitions arch/mips/isa/formats/mem.isa: Define LoadMemory & Store Memory formats Use style of formatting & base class similar to what was used for ALPHA arch/mips/isa/formats/util.isa: Insert LoadStoreBase function here from alpha/arch/isa/mem.isa arch/mips/isa/operands.isa: change shw->sh and uhw->uh --HG-- extra : convert_revision : 5d85f15f4a600dd4c473a3b4a170ba39cf07fc8a
2006-02-20 20:30:23 +01:00
'sh' : ('signed int', 16),
'uh' : ('unsigned int', 16),
Some stuff aparently didn't get committed which was from before the new repository was created. SConscript: There is a new SConscript in the arch/alpha directory which has the alpha specific files. To add files for an arch, a similar file should be created. arch/isa_parser.py: The isa parser now supports include directives. These are done with ##include build/SConstruct: The target directory is passed on so that the architecture specific SConscript can have it. Also, sparc was added as a valid architecture type. arch/alpha/SConscript: This SConscript adds the alpha specific source arch/sparc/isa_desc/operands.h: This sets up the operand types that the sparc isa uses arch/sparc/isa_traits.cc: Implementation of sparc specific things, like a register file with windows build/build_options/default/SPARC_SE: The default options for a sparc syscall emulation build. --HG-- extra : convert_revision : 1afedae61dc8cae0d59d3bf1d41420d929be2efd
2006-01-25 01:57:17 +01:00
'sw' : ('signed int', 32),
'uw' : ('unsigned int', 32),
another big step to a parsable ISA ... no errors after I used a symbolic link for arch/alpha/main.isa to test my files ... arch/mips/isa/operands.isa: use sd and ud instead of sdw and udw --HG-- extra : convert_revision : d66f3fd2c4a4d70e6015f0f1643c400cdfe73055
2006-02-15 04:43:14 +01:00
'sd' : ('signed int', 64),
'ud' : ('unsigned int', 64),
Some stuff aparently didn't get committed which was from before the new repository was created. SConscript: There is a new SConscript in the arch/alpha directory which has the alpha specific files. To add files for an arch, a similar file should be created. arch/isa_parser.py: The isa parser now supports include directives. These are done with ##include build/SConstruct: The target directory is passed on so that the architecture specific SConscript can have it. Also, sparc was added as a valid architecture type. arch/alpha/SConscript: This SConscript adds the alpha specific source arch/sparc/isa_desc/operands.h: This sets up the operand types that the sparc isa uses arch/sparc/isa_traits.cc: Implementation of sparc specific things, like a register file with windows build/build_options/default/SPARC_SE: The default options for a sparc syscall emulation build. --HG-- extra : convert_revision : 1afedae61dc8cae0d59d3bf1d41420d929be2efd
2006-01-25 01:57:17 +01:00
'sf' : ('float', 32),
'df' : ('float', 64),
'qf' : ('float', 128)
}};
def operands {{
Polishing of isa_parser.py internal operand handling, resulting in minor change to syntax of 'def operands' in ISA descriptions. arch/alpha/isa/main.isa: arch/mips/isa/operands.isa: arch/sparc/isa/operands.isa: Change 'def operands' statement to work with new isa_parser changes. arch/isa_parser.py: Merge OperandTraits and OperandDescriptor objects into a unified hierarchy of Operand objects. Required a change in the syntax of the 'def operands' statement in the ISA description. --HG-- extra : convert_revision : cb43f1607311497ead88ba13953d410ab5bc6a37
2006-02-12 06:31:19 +01:00
'Rd': ('IntReg', 'uw', 'RD', 'IsInteger', 1),
'Rs': ('IntReg', 'uw', 'RS', 'IsInteger', 2),
'Rt': ('IntReg', 'uw', 'RT', 'IsInteger', 3),
updated MIPS ISA files .... all files should be able to compile/build with MIPS option except isa_traits.* which I need to update the misc. regfile accesses arch/mips/faults.cc: arch/mips/faults.hh: alpha to mips arch/mips/isa/base.isa: add includes arch/mips/isa/bitfields.isa: more bitfields arch/mips/isa/decoder.isa: lots o' lots o' lots o' changes!!!! arch/mips/isa/formats.isa: include cop0.isa arch/mips/isa/formats/basic.isa: fix faults arch/mips/isa/formats/branch.isa: arch/mips/isa/formats/fp.isa: arch/mips/isa/formats/int.isa: arch/mips/isa/formats/mem.isa: arch/mips/isa/formats/noop.isa: arch/mips/isa/formats/trap.isa: arch/mips/isa/formats/unimp.isa: arch/mips/isa/formats/unknown.isa: arch/mips/isa/formats/util.isa: arch/mips/isa/operands.isa: arch/mips/isa_traits.cc: arch/mips/linux_process.cc: merge MIPS-specific comilable/buidable files code into multiarch arch/mips/isa_traits.hh: merge MIPS-specific comilable/buidable files code into multiarch... the miscRegs file accesses i have need to be recoded and everything should build then ... arch/mips/stacktrace.hh: file copied over --HG-- extra : convert_revision : 4a72e14fc5fb0a0d1f8b205dadbbf69636b7fb1f
2006-03-08 08:05:38 +01:00
'r31': ('IntReg', 'uw','R31','IsInteger', 4),
'R0': ('IntReg', 'uw','R0', 'IsInteger', 5),
Changed MIPS and Alpha to pass the syscall number to the syscall function arch/alpha/isa/decoder.isa: Fixed up Alpha to pass the syscall number directly to the syscall function. arch/mips/isa/decoder.isa: Fixed up MIPS to pass the syscall number directly to the syscall function. arch/mips/isa/operands.isa: Added an R2 operand which is passed to the syscall function as the syscall number to use. --HG-- extra : convert_revision : 066d486cd6a2761b29e413c6d526c268788975f3
2006-04-18 15:44:24 +02:00
'R2': ('IntReg', 'uw','2', 'IsInteger', 5),
mainly added minor support for the basic arithmetic operations (add, mult, shift) arch/mips/isa/bitfields.def: Add comment, move definition up in file arch/mips/isa/decoder.def: add basic arithmetic operations arch/mips/isa/formats/fp.format: change Integer -> FP words arch/mips/isa/formats/int.format: Add derived IntImm class arch/mips/isa/operands.def: change to MIPS sytle operands --HG-- rename : arch/mips/isa/formats/fpop.format => arch/mips/isa/formats/fp.format rename : arch/mips/isa/formats/integerop.format => arch/mips/isa/formats/int.format extra : convert_revision : a95da47bc981e56a9898421da4eeb9c442d1dc15
2006-02-04 05:04:06 +01:00
Polishing of isa_parser.py internal operand handling, resulting in minor change to syntax of 'def operands' in ISA descriptions. arch/alpha/isa/main.isa: arch/mips/isa/operands.isa: arch/sparc/isa/operands.isa: Change 'def operands' statement to work with new isa_parser changes. arch/isa_parser.py: Merge OperandTraits and OperandDescriptor objects into a unified hierarchy of Operand objects. Required a change in the syntax of the 'def operands' statement in the ISA description. --HG-- extra : convert_revision : cb43f1607311497ead88ba13953d410ab5bc6a37
2006-02-12 06:31:19 +01:00
'IntImm': ('IntReg', 'uw', 'INTIMM', 'IsInteger', 3),
mainly added minor support for the basic arithmetic operations (add, mult, shift) arch/mips/isa/bitfields.def: Add comment, move definition up in file arch/mips/isa/decoder.def: add basic arithmetic operations arch/mips/isa/formats/fp.format: change Integer -> FP words arch/mips/isa/formats/int.format: Add derived IntImm class arch/mips/isa/operands.def: change to MIPS sytle operands --HG-- rename : arch/mips/isa/formats/fpop.format => arch/mips/isa/formats/fp.format rename : arch/mips/isa/formats/integerop.format => arch/mips/isa/formats/int.format extra : convert_revision : a95da47bc981e56a9898421da4eeb9c442d1dc15
2006-02-04 05:04:06 +01:00
Polishing of isa_parser.py internal operand handling, resulting in minor change to syntax of 'def operands' in ISA descriptions. arch/alpha/isa/main.isa: arch/mips/isa/operands.isa: arch/sparc/isa/operands.isa: Change 'def operands' statement to work with new isa_parser changes. arch/isa_parser.py: Merge OperandTraits and OperandDescriptor objects into a unified hierarchy of Operand objects. Required a change in the syntax of the 'def operands' statement in the ISA description. --HG-- extra : convert_revision : cb43f1607311497ead88ba13953d410ab5bc6a37
2006-02-12 06:31:19 +01:00
'Fd': ('FloatReg', 'sf', 'FD', 'IsFloating', 1),
'Fs': ('FloatReg', 'sf', 'FS', 'IsFloating', 2),
'Ft': ('FloatReg', 'sf', 'FT', 'IsFloating', 3),
updated MIPS ISA files .... all files should be able to compile/build with MIPS option except isa_traits.* which I need to update the misc. regfile accesses arch/mips/faults.cc: arch/mips/faults.hh: alpha to mips arch/mips/isa/base.isa: add includes arch/mips/isa/bitfields.isa: more bitfields arch/mips/isa/decoder.isa: lots o' lots o' lots o' changes!!!! arch/mips/isa/formats.isa: include cop0.isa arch/mips/isa/formats/basic.isa: fix faults arch/mips/isa/formats/branch.isa: arch/mips/isa/formats/fp.isa: arch/mips/isa/formats/int.isa: arch/mips/isa/formats/mem.isa: arch/mips/isa/formats/noop.isa: arch/mips/isa/formats/trap.isa: arch/mips/isa/formats/unimp.isa: arch/mips/isa/formats/unknown.isa: arch/mips/isa/formats/util.isa: arch/mips/isa/operands.isa: arch/mips/isa_traits.cc: arch/mips/linux_process.cc: merge MIPS-specific comilable/buidable files code into multiarch arch/mips/isa_traits.hh: merge MIPS-specific comilable/buidable files code into multiarch... the miscRegs file accesses i have need to be recoded and everything should build then ... arch/mips/stacktrace.hh: file copied over --HG-- extra : convert_revision : 4a72e14fc5fb0a0d1f8b205dadbbf69636b7fb1f
2006-03-08 08:05:38 +01:00
'Fr': ('FloatReg', 'sf', 'FR', 'IsFloating', 3),
mainly added minor support for the basic arithmetic operations (add, mult, shift) arch/mips/isa/bitfields.def: Add comment, move definition up in file arch/mips/isa/decoder.def: add basic arithmetic operations arch/mips/isa/formats/fp.format: change Integer -> FP words arch/mips/isa/formats/int.format: Add derived IntImm class arch/mips/isa/operands.def: change to MIPS sytle operands --HG-- rename : arch/mips/isa/formats/fpop.format => arch/mips/isa/formats/fp.format rename : arch/mips/isa/formats/integerop.format => arch/mips/isa/formats/int.format extra : convert_revision : a95da47bc981e56a9898421da4eeb9c442d1dc15
2006-02-04 05:04:06 +01:00
Finally MIPS does hello world! arch/mips/isa/bitfields.isa: add RS_SRL bitfield ...these must be set to 0 for a SRL instruction arch/mips/isa/decoder.isa: Make unimplemented instructions Fail instead of just Warn Edits to SRA & SRAV instructions Implement CFC1 instructions Unaligned Memory Access Support (Maybe Not fully functional yet) Enforce a more strict decode policy (in terms of different bitfields set to 0 on certain instructions) arch/mips/isa/formats/branch.isa: Fix disassembly arch/mips/isa/formats/int.isa: Add sign extend Immediate and zero extend Immediate to Int class. Probably a bit unnecessary in the long run since these manipulations could be done in the actually instruction instead of keep a int value arch/mips/isa/formats/mem.isa: Comment/Remove out split-memory access code... revisit this after SimpleCPU works arch/mips/isa/formats/unimp.isa: Add inst2string function to Unimplemented panic. PRints out the instruction binary to help in debuggin arch/mips/isa/formats/unknown.isa: define inst2string function , use in unknown disassembly and panic function arch/mips/isa/operands.isa: Make "Mem" default to a unsigned word since this is MIPS32 arch/mips/isa_traits.hh: change return values to 32 instead of 64 arch/mips/linux_process.cc: assign some syscalls to the right functions cpu/static_inst.hh: more debug functions for MIPS (these will be move to the mips directory soon) mem/page_table.cc: mem/page_table.hh: toward a better implementation for unaligned memory access mem/request.hh: NO ALIGN FAULT flag added to support unaligned memory access sim/syscall_emul.cc: additional SyscallVerbose comments --HG-- extra : convert_revision : 1987d80c9f4ede507f1f0148435e0bee97d2428c
2006-04-10 18:23:17 +02:00
'Mem': ('Mem', 'uw', None, ('IsMemRef', 'IsLoad', 'IsStore'), 4),
mainly added minor support for the basic arithmetic operations (add, mult, shift) arch/mips/isa/bitfields.def: Add comment, move definition up in file arch/mips/isa/decoder.def: add basic arithmetic operations arch/mips/isa/formats/fp.format: change Integer -> FP words arch/mips/isa/formats/int.format: Add derived IntImm class arch/mips/isa/operands.def: change to MIPS sytle operands --HG-- rename : arch/mips/isa/formats/fpop.format => arch/mips/isa/formats/fp.format rename : arch/mips/isa/formats/integerop.format => arch/mips/isa/formats/int.format extra : convert_revision : a95da47bc981e56a9898421da4eeb9c442d1dc15
2006-02-04 05:04:06 +01:00
Support NNPC and branch instructions ... Outputs to decoder.cc correctly Edits to the CPU model may still need to be made to handle branch likely insts... arch/isa_parser.py: add a NNPC operand ... arch/mips/isa/base.isa: change SPARC to MIPS arch/mips/isa/decoder.isa: typo < to >= arch/mips/isa/formats/basic.isa: spacing arch/mips/isa/formats/branch.isa: add code for branch instructions (still need adjustments for the branch likely) arch/mips/isa/operands.isa: support for NNPC and R31 arch/mips/isa_traits.hh: NNPC Addr variable --HG-- extra : convert_revision : df03d2a71c36dbc00270c2e3d7882b4f09ed97ad
2006-02-19 05:17:45 +01:00
'NPC': ('NPC', 'uw', None, ( None, None, 'IsControl' ), 4),
updated MIPS ISA files .... all files should be able to compile/build with MIPS option except isa_traits.* which I need to update the misc. regfile accesses arch/mips/faults.cc: arch/mips/faults.hh: alpha to mips arch/mips/isa/base.isa: add includes arch/mips/isa/bitfields.isa: more bitfields arch/mips/isa/decoder.isa: lots o' lots o' lots o' changes!!!! arch/mips/isa/formats.isa: include cop0.isa arch/mips/isa/formats/basic.isa: fix faults arch/mips/isa/formats/branch.isa: arch/mips/isa/formats/fp.isa: arch/mips/isa/formats/int.isa: arch/mips/isa/formats/mem.isa: arch/mips/isa/formats/noop.isa: arch/mips/isa/formats/trap.isa: arch/mips/isa/formats/unimp.isa: arch/mips/isa/formats/unknown.isa: arch/mips/isa/formats/util.isa: arch/mips/isa/operands.isa: arch/mips/isa_traits.cc: arch/mips/linux_process.cc: merge MIPS-specific comilable/buidable files code into multiarch arch/mips/isa_traits.hh: merge MIPS-specific comilable/buidable files code into multiarch... the miscRegs file accesses i have need to be recoded and everything should build then ... arch/mips/stacktrace.hh: file copied over --HG-- extra : convert_revision : 4a72e14fc5fb0a0d1f8b205dadbbf69636b7fb1f
2006-03-08 08:05:38 +01:00
'NNPC':('NNPC', 'uw', None, ( None, None, 'IsControl' ), 4)
Some stuff aparently didn't get committed which was from before the new repository was created. SConscript: There is a new SConscript in the arch/alpha directory which has the alpha specific files. To add files for an arch, a similar file should be created. arch/isa_parser.py: The isa parser now supports include directives. These are done with ##include build/SConstruct: The target directory is passed on so that the architecture specific SConscript can have it. Also, sparc was added as a valid architecture type. arch/alpha/SConscript: This SConscript adds the alpha specific source arch/sparc/isa_desc/operands.h: This sets up the operand types that the sparc isa uses arch/sparc/isa_traits.cc: Implementation of sparc specific things, like a register file with windows build/build_options/default/SPARC_SE: The default options for a sparc syscall emulation build. --HG-- extra : convert_revision : 1afedae61dc8cae0d59d3bf1d41420d929be2efd
2006-01-25 01:57:17 +01:00
}};
Reference in a new issue Copy permalink