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gem5/tests/long/00.gzip/ref/sparc/linux/o3-timing/simout

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tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
M5 Simulator System
Copyright (c) 2001-2008
The Regents of The University of Michigan
All Rights Reserved
stats: update stats for previous cset Coherence protocol change basically got rid of UpgradeReqs in L2 caches, other minor related cache stat changes.
2010-09-22 08:07:35 +02:00
M5 compiled Sep 20 2010 15:04:49
M5 revision 0c4a7d867247 7686 default qtip print-identical tip
M5 started Sep 20 2010 16:20:33
M5 executing on phenom
stats: update stats for preceding coherence changes Because the handling of the E state for multilevel caches has changed, stats are affected for any non-ruby config with caches, even uniprocessor simple CPU.
2010-09-09 20:40:19 +02:00
command line: build/SPARC_SE/m5.opt -d build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing -re tests/run.py build/SPARC_SE/tests/opt/long/00.gzip/sparc/linux/o3-timing
tests: update config.ini and stdout for the various tests. These files were a bit too out of date and resulted in a bit of confusion.
2008-07-22 23:00:18 +02:00
Global frequency set at 1000000000000 ticks per second
Reference updates. Since split cache is gone, a lot of config.ini changes, and minor changes to stats that are likely due to the decoupling of insertions/evictions in the cache.
2008-11-06 17:11:42 +01:00
info: Entering event queue @ 0. Starting simulation...
Update of reference outputs. SPARC_SE o3 gzip didn't have reference outputs, mcf has a reduced input size, and most of the other changes are for a change in how branch mispredicts work which makes things more accurate. --HG-- extra : convert_revision : 33ad6a220945b344d2fc5c6abef8e67467e0c0ec
2007-06-22 21:06:10 +02:00
spec_init
Loading Input Data
Duplicating 262144 bytes
Duplicating 524288 bytes
Input data 1048576 bytes in length
Compressing Input Data, level 1
Compressed data 108074 bytes in length
Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Compressing Input Data, level 3
Compressed data 97831 bytes in length
Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Compressing Input Data, level 5
Compressed data 83382 bytes in length
Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Compressing Input Data, level 7
Compressed data 76606 bytes in length
Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Compressing Input Data, level 9
Compressed data 73189 bytes in length
Uncompressing Data
Uncompressed data 1048576 bytes in length
Uncompressed data compared correctly
Tested 1MB buffer: OK!
stats: update stats for previous cset Coherence protocol change basically got rid of UpgradeReqs in L2 caches, other minor related cache stat changes.
2010-09-22 08:07:35 +02:00
Exiting @ tick 1095331467500 because target called exit()
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