2007-11-13 22:58:16 +01:00
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/*
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2007-11-15 20:21:01 +01:00
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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2007-11-13 22:58:16 +01:00
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*
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2007-11-15 20:21:01 +01:00
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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2007-11-13 22:58:16 +01:00
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*
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2007-11-15 20:21:01 +01:00
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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2007-11-13 22:58:16 +01:00
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*
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2007-11-15 20:21:01 +01:00
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* Authors: Nathan Binkert
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2007-11-13 22:58:16 +01:00
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*/
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#include <string>
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#include "arch/mips/isa_traits.hh"
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#include "arch/mips/stacktrace.hh"
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#include "arch/mips/vtophys.hh"
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#include "base/bitfield.hh"
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#include "base/trace.hh"
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#include "cpu/base.hh"
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#include "cpu/thread_context.hh"
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2012-01-28 16:24:01 +01:00
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#include "mem/fs_translating_port_proxy.hh"
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2007-11-13 22:58:16 +01:00
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#include "sim/system.hh"
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using namespace std;
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using namespace MipsISA;
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2009-07-21 10:08:53 +02:00
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ProcessInfo::ProcessInfo(ThreadContext *_tc) : tc(_tc)
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{}
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2007-11-13 22:58:16 +01:00
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Addr
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ProcessInfo::task(Addr ksp) const
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{
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Addr base = ksp & ~0x3fff;
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if (base == ULL(0xfffffc0000000000))
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return 0;
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Addr tsk;
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2012-01-17 19:55:08 +01:00
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FSTranslatingPortProxy* vp;
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2007-11-13 22:58:16 +01:00
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2012-01-17 19:55:08 +01:00
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vp = tc->getVirtProxy();
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2007-11-13 22:58:16 +01:00
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tsk = vp->readGtoH<Addr>(base + task_off);
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return tsk;
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}
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int
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ProcessInfo::pid(Addr ksp) const
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{
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Addr task = this->task(ksp);
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if (!task)
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return -1;
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uint16_t pd;
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2012-01-17 19:55:08 +01:00
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FSTranslatingPortProxy* vp;
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2007-11-13 22:58:16 +01:00
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2012-01-17 19:55:08 +01:00
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vp = tc->getVirtProxy();
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2007-11-13 22:58:16 +01:00
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pd = vp->readGtoH<uint16_t>(task + pid_off);
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return pd;
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}
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string
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ProcessInfo::name(Addr ksp) const
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{
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Addr task = this->task(ksp);
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if (!task)
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return "console";
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char comm[256];
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CopyStringOut(tc, comm, task + name_off, sizeof(comm));
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if (!comm[0])
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return "startup";
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return comm;
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}
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StackTrace::StackTrace()
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: tc(0), stack(64)
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{
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}
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StackTrace::StackTrace(ThreadContext *_tc, StaticInstPtr inst)
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: tc(0), stack(64)
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{
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trace(_tc, inst);
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}
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StackTrace::~StackTrace()
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{
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}
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void
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StackTrace::trace(ThreadContext *_tc, bool is_call)
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{
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tc = _tc;
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bool usermode = 0;
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if (usermode) {
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stack.push_back(user);
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return;
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}
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}
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bool
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StackTrace::isEntry(Addr addr)
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{
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return false;
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}
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bool
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StackTrace::decodeStack(MachInst inst, int &disp)
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{
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// lda $sp, -disp($sp)
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//
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// Opcode<31:26> == 0x08
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// RA<25:21> == 30
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// RB<20:16> == 30
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// Disp<15:0>
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const MachInst mem_mask = 0xffff0000;
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const MachInst lda_pattern = 0x23de0000;
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const MachInst lda_disp_mask = 0x0000ffff;
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// subq $sp, disp, $sp
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// addq $sp, disp, $sp
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//
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// Opcode<31:26> == 0x10
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// RA<25:21> == 30
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// Lit<20:13>
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// One<12> = 1
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// Func<11:5> == 0x20 (addq)
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// Func<11:5> == 0x29 (subq)
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// RC<4:0> == 30
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const MachInst intop_mask = 0xffe01fff;
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const MachInst addq_pattern = 0x43c0141e;
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const MachInst subq_pattern = 0x43c0153e;
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const MachInst intop_disp_mask = 0x001fe000;
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const int intop_disp_shift = 13;
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if ((inst & mem_mask) == lda_pattern)
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disp = -sext<16>(inst & lda_disp_mask);
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else if ((inst & intop_mask) == addq_pattern)
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disp = -int((inst & intop_disp_mask) >> intop_disp_shift);
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else if ((inst & intop_mask) == subq_pattern)
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disp = int((inst & intop_disp_mask) >> intop_disp_shift);
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else
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return false;
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return true;
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}
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bool
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StackTrace::decodeSave(MachInst inst, int ®, int &disp)
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{
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// lda $stq, disp($sp)
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//
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// Opcode<31:26> == 0x08
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// RA<25:21> == ?
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// RB<20:16> == 30
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// Disp<15:0>
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const MachInst stq_mask = 0xfc1f0000;
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const MachInst stq_pattern = 0xb41e0000;
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const MachInst stq_disp_mask = 0x0000ffff;
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const MachInst reg_mask = 0x03e00000;
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const int reg_shift = 21;
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if ((inst & stq_mask) == stq_pattern) {
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reg = (inst & reg_mask) >> reg_shift;
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disp = sext<16>(inst & stq_disp_mask);
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} else {
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return false;
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}
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return true;
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}
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/*
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* Decode the function prologue for the function we're in, and note
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* which registers are stored where, and how large the stack frame is.
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*/
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bool
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StackTrace::decodePrologue(Addr sp, Addr callpc, Addr func,
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int &size, Addr &ra)
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{
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size = 0;
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ra = 0;
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for (Addr pc = func; pc < callpc; pc += sizeof(MachInst)) {
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MachInst inst;
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CopyOut(tc, (uint8_t *)&inst, pc, sizeof(MachInst));
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int reg, disp;
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if (decodeStack(inst, disp)) {
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if (size) {
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return true;
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}
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size += disp;
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} else if (decodeSave(inst, reg, disp)) {
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if (!ra && reg == ReturnAddressReg) {
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CopyOut(tc, (uint8_t *)&ra, sp + disp, sizeof(Addr));
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if (!ra) {
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return false;
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}
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}
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}
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}
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return true;
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}
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#if TRACING_ON
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void
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StackTrace::dump()
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{
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2009-07-21 10:08:53 +02:00
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panic("Stack trace dump not implemented.\n");
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2007-11-13 22:58:16 +01:00
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}
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#endif
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