xv6-cs450/x86.h

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C
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// Routines to let C code use special x86 instructions.
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static inline uchar
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inb(ushort port)
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{
uchar data;
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asm volatile("in %1,%0" : "=a" (data) : "d" (port));
return data;
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}
static inline void
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insl(int port, void *addr, int cnt)
{
asm volatile("cld\n\trepne\n\tinsl" :
"=D" (addr), "=c" (cnt) :
"d" (port), "0" (addr), "1" (cnt) :
"memory", "cc");
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}
static inline void
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outb(ushort port, uchar data)
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{
asm volatile("out %0,%1" : : "a" (data), "d" (port));
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}
static inline void
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outw(ushort port, ushort data)
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{
asm volatile("out %0,%1" : : "a" (data), "d" (port));
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}
static inline void
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outsl(int port, const void *addr, int cnt)
{
asm volatile("cld\n\trepne\n\toutsl" :
"=S" (addr), "=c" (cnt) :
"d" (port), "0" (addr), "1" (cnt) :
"cc");
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}
struct segdesc;
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static inline void
lgdt(struct segdesc *p, int size)
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{
volatile ushort pd[3];
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pd[0] = size-1;
pd[1] = (uint)p;
pd[2] = (uint)p >> 16;
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asm volatile("lgdt (%0)" : : "r" (pd));
}
struct gatedesc;
static inline void
lidt(struct gatedesc *p, int size)
{
volatile ushort pd[3];
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pd[0] = size-1;
pd[1] = (uint)p;
pd[2] = (uint)p >> 16;
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asm volatile("lidt (%0)" : : "r" (pd));
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}
static inline void
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ltr(ushort sel)
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{
asm volatile("ltr %0" : : "r" (sel));
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}
static inline uint
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read_eflags(void)
{
uint eflags;
asm volatile("pushfl; popl %0" : "=r" (eflags));
return eflags;
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}
static inline void
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write_eflags(uint eflags)
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{
asm volatile("pushl %0; popfl" : : "r" (eflags));
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}
static inline void
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cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
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{
uint eax, ebx, ecx, edx;
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asm volatile("cpuid" :
"=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx) :
"a" (info));
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if(eaxp)
*eaxp = eax;
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if(ebxp)
*ebxp = ebx;
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if(ecxp)
*ecxp = ecx;
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if(edxp)
*edxp = edx;
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}
static inline uint
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cmpxchg(uint oldval, uint newval, volatile uint* lock_addr)
{
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uint result;
// The + in "+m" denotes a read-modify-write operand.
asm volatile("lock; cmpxchgl %2, %0" :
"+m" (*lock_addr), "=a" (result) :
"r"(newval), "1"(oldval) :
"cc");
return result;
}
static inline void
cli(void)
{
asm volatile("cli");
}
static inline void
sti(void)
{
asm volatile("sti");
}
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// Layout of the trap frame built on the stack by the
// hardware and by trapasm.S, and passed to trap().
struct trapframe {
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// registers as pushed by pusha
uint edi;
uint esi;
uint ebp;
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uint oesp; // useless & ignored
uint ebx;
uint edx;
uint ecx;
uint eax;
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// rest of trap frame
ushort es;
ushort padding1;
ushort ds;
ushort padding2;
uint trapno;
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// below here defined by x86 hardware
uint err;
uint eip;
ushort cs;
ushort padding3;
uint eflags;
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// below here only when crossing rings, such as from user to kernel
uint esp;
ushort ss;
ushort padding4;
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};