2006-06-12 17:22:12 +02:00
|
|
|
static __inline void breakpoint(void) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uchar inb(int port) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void insb(int port, void *addr, int cnt) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline ushort inw(int port) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void insw(int port, void *addr, int cnt) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint inl(int port) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void insl(int port, void *addr, int cnt) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline void outb(int port, uchar data) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void outsb(int port, const void *addr, int cnt) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline void outw(int port, ushort data) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void outsw(int port, const void *addr, int cnt) __attribute__((always_inline));
|
|
|
|
static __inline void outsl(int port, const void *addr, int cnt) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline void outl(int port, uint data) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void invlpg(void *addr) __attribute__((always_inline));
|
2006-07-17 03:58:13 +02:00
|
|
|
struct segdesc;
|
|
|
|
static __inline void lgdt(struct segdesc *p, int) __attribute__((always_inline));
|
|
|
|
struct gatedesc;
|
|
|
|
static __inline void lidt(struct gatedesc *p, int) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline void lldt(ushort sel) __attribute__((always_inline));
|
|
|
|
static __inline void ltr(ushort sel) __attribute__((always_inline));
|
|
|
|
static __inline void lcr0(uint val) __attribute__((always_inline));
|
|
|
|
static __inline uint rcr0(void) __attribute__((always_inline));
|
|
|
|
static __inline uint rcr2(void) __attribute__((always_inline));
|
|
|
|
static __inline void lcr3(uint val) __attribute__((always_inline));
|
|
|
|
static __inline uint rcr3(void) __attribute__((always_inline));
|
|
|
|
static __inline void lcr4(uint val) __attribute__((always_inline));
|
|
|
|
static __inline uint rcr4(void) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void tlbflush(void) __attribute__((always_inline));
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint read_eflags(void) __attribute__((always_inline));
|
|
|
|
static __inline void write_eflags(uint eflags) __attribute__((always_inline));
|
|
|
|
static __inline uint read_ebp(void) __attribute__((always_inline));
|
|
|
|
static __inline uint read_esp(void) __attribute__((always_inline));
|
|
|
|
static __inline void cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp);
|
2006-07-16 03:15:28 +02:00
|
|
|
static __inline void cli(void) __attribute__((always_inline));
|
|
|
|
static __inline void sti(void) __attribute__((always_inline));
|
2006-06-12 17:22:12 +02:00
|
|
|
|
|
|
|
static __inline void
|
|
|
|
breakpoint(void)
|
|
|
|
{
|
|
|
|
__asm __volatile("int3");
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uchar
|
2006-06-12 17:22:12 +02:00
|
|
|
inb(int port)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uchar data;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("inb %w1,%0" : "=a" (data) : "d" (port));
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
insb(int port, void *addr, int cnt)
|
|
|
|
{
|
|
|
|
__asm __volatile("cld\n\trepne\n\tinsb" :
|
|
|
|
"=D" (addr), "=c" (cnt) :
|
|
|
|
"d" (port), "0" (addr), "1" (cnt) :
|
|
|
|
"memory", "cc");
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline ushort
|
2006-06-12 17:22:12 +02:00
|
|
|
inw(int port)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
ushort data;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("inw %w1,%0" : "=a" (data) : "d" (port));
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
insw(int port, void *addr, int cnt)
|
|
|
|
{
|
|
|
|
__asm __volatile("cld\n\trepne\n\tinsw" :
|
|
|
|
"=D" (addr), "=c" (cnt) :
|
|
|
|
"d" (port), "0" (addr), "1" (cnt) :
|
|
|
|
"memory", "cc");
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
inl(int port)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint data;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("inl %w1,%0" : "=a" (data) : "d" (port));
|
|
|
|
return data;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
insl(int port, void *addr, int cnt)
|
|
|
|
{
|
|
|
|
__asm __volatile("cld\n\trepne\n\tinsl" :
|
|
|
|
"=D" (addr), "=c" (cnt) :
|
|
|
|
"d" (port), "0" (addr), "1" (cnt) :
|
|
|
|
"memory", "cc");
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
outb(int port, uchar data)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("outb %0,%w1" : : "a" (data), "d" (port));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
outsb(int port, const void *addr, int cnt)
|
|
|
|
{
|
|
|
|
__asm __volatile("cld\n\trepne\n\toutsb" :
|
|
|
|
"=S" (addr), "=c" (cnt) :
|
|
|
|
"d" (port), "0" (addr), "1" (cnt) :
|
|
|
|
"cc");
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
outw(int port, ushort data)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("outw %0,%w1" : : "a" (data), "d" (port));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
outsw(int port, const void *addr, int cnt)
|
|
|
|
{
|
|
|
|
__asm __volatile("cld\n\trepne\n\toutsw" :
|
|
|
|
"=S" (addr), "=c" (cnt) :
|
|
|
|
"d" (port), "0" (addr), "1" (cnt) :
|
|
|
|
"cc");
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
outsl(int port, const void *addr, int cnt)
|
|
|
|
{
|
|
|
|
__asm __volatile("cld\n\trepne\n\toutsl" :
|
|
|
|
"=S" (addr), "=c" (cnt) :
|
|
|
|
"d" (port), "0" (addr), "1" (cnt) :
|
|
|
|
"cc");
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
outl(int port, uint data)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("outl %0,%w1" : : "a" (data), "d" (port));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
invlpg(void *addr)
|
|
|
|
{
|
|
|
|
__asm __volatile("invlpg (%0)" : : "r" (addr) : "memory");
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-17 03:58:13 +02:00
|
|
|
lgdt(struct segdesc *p, int size)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
volatile ushort pd[3];
|
2006-07-16 18:55:52 +02:00
|
|
|
|
|
|
|
pd[0] = size-1;
|
|
|
|
pd[1] = (uint)p;
|
|
|
|
pd[2] = (uint)p >> 16;
|
|
|
|
|
|
|
|
asm volatile("lgdt (%0)" : : "g" (pd));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-17 03:58:13 +02:00
|
|
|
lidt(struct gatedesc *p, int size)
|
2006-07-16 18:55:52 +02:00
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
volatile ushort pd[3];
|
2006-07-16 18:55:52 +02:00
|
|
|
|
|
|
|
pd[0] = size-1;
|
|
|
|
pd[1] = (uint)p;
|
|
|
|
pd[2] = (uint)p >> 16;
|
|
|
|
|
|
|
|
asm volatile("lidt (%0)" : : "g" (pd));
|
2006-06-12 17:22:12 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
lldt(ushort sel)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("lldt %0" : : "r" (sel));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
ltr(ushort sel)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("ltr %0" : : "r" (sel));
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
lcr0(uint val)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("movl %0,%%cr0" : : "r" (val));
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
rcr0(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint val;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("movl %%cr0,%0" : "=r" (val));
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
rcr2(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint val;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("movl %%cr2,%0" : "=r" (val));
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
lcr3(uint val)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("movl %0,%%cr3" : : "r" (val));
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
rcr3(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint val;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("movl %%cr3,%0" : "=r" (val));
|
|
|
|
return val;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
lcr4(uint val)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("movl %0,%%cr4" : : "r" (val));
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
rcr4(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint cr4;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("movl %%cr4,%0" : "=r" (cr4));
|
|
|
|
return cr4;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
tlbflush(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint cr3;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("movl %%cr3,%0" : "=r" (cr3));
|
|
|
|
__asm __volatile("movl %0,%%cr3" : : "r" (cr3));
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
read_eflags(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint eflags;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("pushfl; popl %0" : "=r" (eflags));
|
|
|
|
return eflags;
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
write_eflags(uint eflags)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
|
|
|
__asm __volatile("pushl %0; popfl" : : "r" (eflags));
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
read_ebp(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint ebp;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("movl %%ebp,%0" : "=r" (ebp));
|
|
|
|
return ebp;
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-06-12 17:22:12 +02:00
|
|
|
read_esp(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint esp;
|
2006-06-12 17:22:12 +02:00
|
|
|
__asm __volatile("movl %%esp,%0" : "=r" (esp));
|
|
|
|
return esp;
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-07-01 23:26:01 +02:00
|
|
|
read_esi(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint esi;
|
2006-07-01 23:26:01 +02:00
|
|
|
__asm __volatile("movl %%esi,%0" : "=r" (esi));
|
|
|
|
return esi;
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-07-01 23:26:01 +02:00
|
|
|
read_edi(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint edi;
|
2006-07-01 23:26:01 +02:00
|
|
|
__asm __volatile("movl %%edi,%0" : "=r" (edi));
|
|
|
|
return edi;
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
2006-07-01 23:26:01 +02:00
|
|
|
read_ebx(void)
|
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint ebx;
|
2006-07-01 23:26:01 +02:00
|
|
|
__asm __volatile("movl %%ebx,%0" : "=r" (ebx));
|
|
|
|
return ebx;
|
|
|
|
}
|
|
|
|
|
2006-06-12 17:22:12 +02:00
|
|
|
static __inline void
|
2006-07-20 11:07:53 +02:00
|
|
|
cpuid(uint info, uint *eaxp, uint *ebxp, uint *ecxp, uint *edxp)
|
2006-06-12 17:22:12 +02:00
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint eax, ebx, ecx, edx;
|
2006-06-12 17:22:12 +02:00
|
|
|
asm volatile("cpuid"
|
|
|
|
: "=a" (eax), "=b" (ebx), "=c" (ecx), "=d" (edx)
|
|
|
|
: "a" (info));
|
|
|
|
if (eaxp)
|
|
|
|
*eaxp = eax;
|
|
|
|
if (ebxp)
|
|
|
|
*ebxp = ebx;
|
|
|
|
if (ecxp)
|
|
|
|
*ecxp = ecx;
|
|
|
|
if (edxp)
|
|
|
|
*edxp = edx;
|
|
|
|
}
|
|
|
|
|
2006-07-20 11:07:53 +02:00
|
|
|
static __inline uint
|
|
|
|
cmpxchg(uint oldval, uint newval, volatile uint* lock_addr)
|
2006-06-22 03:28:57 +02:00
|
|
|
{
|
2006-07-20 11:07:53 +02:00
|
|
|
uint result;
|
2006-06-22 03:28:57 +02:00
|
|
|
__asm__ __volatile__(
|
|
|
|
"lock; cmpxchgl %2, %0"
|
|
|
|
:"+m" (*lock_addr), "=a" (result) : "r"(newval), "1"(oldval) : "cc"
|
|
|
|
);
|
|
|
|
return result;
|
|
|
|
}
|
|
|
|
|
2006-07-16 03:15:28 +02:00
|
|
|
static __inline void
|
|
|
|
cli(void)
|
|
|
|
{
|
|
|
|
__asm__ volatile("cli");
|
|
|
|
}
|
|
|
|
|
|
|
|
static __inline void
|
|
|
|
sti(void)
|
|
|
|
{
|
|
|
|
__asm__ volatile("sti");
|
|
|
|
}
|
|
|
|
|
2006-07-17 03:58:13 +02:00
|
|
|
struct trapframe {
|
2006-06-12 17:22:12 +02:00
|
|
|
/* registers as pushed by pusha */
|
2006-07-20 11:07:53 +02:00
|
|
|
uint edi;
|
|
|
|
uint esi;
|
|
|
|
uint ebp;
|
|
|
|
uint oesp; /* Useless */
|
|
|
|
uint ebx;
|
|
|
|
uint edx;
|
|
|
|
uint ecx;
|
|
|
|
uint eax;
|
2006-07-17 03:36:39 +02:00
|
|
|
/* rest of trap frame */
|
2006-07-20 11:07:53 +02:00
|
|
|
ushort es;
|
|
|
|
ushort padding1;
|
|
|
|
ushort ds;
|
|
|
|
ushort padding2;
|
|
|
|
uint trapno;
|
2006-06-12 17:22:12 +02:00
|
|
|
/* below here defined by x86 hardware */
|
2006-07-20 11:07:53 +02:00
|
|
|
uint err;
|
|
|
|
uint eip;
|
|
|
|
ushort cs;
|
|
|
|
ushort padding3;
|
|
|
|
uint eflags;
|
2006-06-12 17:22:12 +02:00
|
|
|
/* below here only when crossing rings, such as from user to kernel */
|
2006-07-20 11:07:53 +02:00
|
|
|
uint esp;
|
|
|
|
ushort ss;
|
|
|
|
ushort padding4;
|
2006-06-12 17:22:12 +02:00
|
|
|
};
|
2006-06-22 03:28:57 +02:00
|
|
|
|
|
|
|
#define MAX_IRQS 16 // Number of IRQs
|
|
|
|
|
|
|
|
#define IRQ_OFFSET 32 // IRQ 0 corresponds to int IRQ_OFFSET
|
|
|
|
|
2006-07-06 23:47:22 +02:00
|
|
|
#define IRQ_IDE 14
|
2006-06-22 03:28:57 +02:00
|
|
|
#define IRQ_ERROR 19
|
|
|
|
#define IRQ_SPURIOUS 31
|