Commit graph

14 commits

Author SHA1 Message Date
Ben Gras
be9fe09e97 x86 multiboot.h
Change-Id: I245564a98fb9e2572b88f8feb7411ad6800a543c
2014-03-03 20:47:05 +01:00
Ben Gras
f4f382d8c0 align ARM cpu.h importing & using armreg.h
Change-Id: I4793517d936f71b0bb7088fbfe67e73a65fafb11
2014-03-03 20:47:04 +01:00
Kees Jongenburger
502bc37a61 arm:indenting
Change-Id: I2f8f664fa4c66649db8981e58e6bb7a6f533df5a
2014-01-07 11:18:26 +01:00
Kees Jongenburger
d60d07f045 arm:caching enable barriers
Change-Id: I2c54a3c3c8f0502bf365901d771a989f7c556958
2013-09-26 12:11:29 +02:00
Kees Jongenburger
34b517ab12 arm:caching mark normal memory cacheable during identity mapping.
Change-Id: I7cd8da168744a3f32276803e99e8af0fea772574
2013-09-26 12:11:28 +02:00
Kees Jongenburger
0f23130180 arm:caching introduce _CACHED defines
Introduce ARM_VM_SECTION_CACHED and ARM_VM_PTE_CACHED to ensure we
are using the correct caching flags everywhere.
2013-09-26 11:54:36 +02:00
Igor Smolyar
3ef93645b9 Use ARM_VM_SECTION_MASK to determine kernel base address
To map kernel we use 1M sections therefore we should use
ARM_VM_SECTION_MASK to determine base address.

Change-Id: I0b97fe459f2325d702aad9b7b1e8e066d9721b87
2013-08-19 09:53:25 +02:00
Antoine Leca
da82f9b2e8 <a.out.h>, MINIX style: remove as obsolete
Change-Id: Icc8b7210d60a93ac9cc4610d676dcba270756410
2013-08-06 11:43:35 +02:00
Kees Jongenburger
1e1ff96aea arm:vm caching fix.
Improve reliability by using write trough cache.
2013-05-16 20:39:20 +02:00
Kees Jongenburger
b9cb8251bc arm:make no assumptions about TRE and AFE
The bootloader can leave the system control register
in at state that doesn't match our setup. make no assumptions
and configure TRE and AFE.
2013-05-16 20:39:19 +02:00
Kees Jongenburger
e6bac75a8b ARM:Rename ARM_BIG_PAGE to ARM_SECTION.
The natural term to use when talking about MINIX big pages on ARM
is SECTION. A section is a level 1 page table entry pointing to
a 1MB area.

Change-Id: I9bd27ca99bc772126c31c27a537b1415db20c4a6
2013-04-29 11:42:26 +02:00
Lionel Sambuc
e4fa9802cb ARM: Enable caches
First round, some more optimizations are possible and should be
activated.

Change-Id: I3b7dee7c82fbffd823a08bec1c5d5ebcf769f92f
2013-02-18 09:08:26 +01:00
Ben Gras
3bc6d7df06 impove memory accounting
. the total amount of memory in the system didn't include the memory
	  used by the boot-time modules and some dynamic allocation by the
	  kernel at boot time (to map in VM). especially apparent on our
	  ARM board with 'only' 512MB of memory and a huge ramdisk.
	. also: *add* the VM loaded module to the freelist after it has
	  been allocated for & mapped in instead of cutting it *out* of the
	  freelist! so we get a few more MB free..

Change-Id: If37ac32b21c9d38610830e21421264da4f20bc4f
2013-02-11 19:31:57 +01:00
Lionel Sambuc
b1c4ba4ab6 ARM updates
Due to the ABI we are using we have to use the earm architecture
moniker for the build system to behave correctly. This involves
then some headers to move around.

There is also a few related Makefile updates as well as minor
source code corrections.
2013-01-17 10:03:58 +01:00
Renamed from kernel/arch/arm/pg_utils.c (Browse further)