Hardware interrupts code path cleanup
- the PIC master and slave irq handlers don't pass the irq hook pointer but just the irq number. It gives a little bit more information to the C handler as the irq number is not lost - the irq code path is more achitecture independent. i386 hw interrupts are called irq and whereever the code is arch independent enough hw_intr_ functions are called to mask/unmask interrupts - the legacy PIC is not the only possible interrupt controller in the x86 world, therefore the intr_(un)mask functions were renamed to signal their functionality explicitly. APIC will add their own. - masking and unmasking PIC interrupt lines is removed from assembler and all the functionality is rewriten in C and moved to i8259.c - interrupt handlers have to unmask the interrupt line if all irq handlers are done. Assembler does not do it anymore
This commit is contained in:
parent
7e73260cf5
commit
cf854041ce
6 changed files with 62 additions and 123 deletions
15
kernel/arch/i386/hw_intr.h
Normal file
15
kernel/arch/i386/hw_intr.h
Normal file
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@ -0,0 +1,15 @@
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#ifndef __HW_INTR_X86_H__
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#define __HW_INTR_X86_H__
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#include "../..//kernel.h"
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/* legacy PIC */
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_PROTOTYPE(int irq_8259_unmask,(int irq));
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_PROTOTYPE(int irq_8259_mask,(int irq));
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_PROTOTYPE(void irq_handle,(int irq));
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#define hw_intr_mask(irq) irq_8259_mask(irq)
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#define hw_intr_unmask(irq) irq_8259_unmask(irq)
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#endif /* __HW_INTR_X86_H__ */
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@ -77,3 +77,16 @@ PUBLIC int intr_disabled(void)
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return 1;
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return 1;
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return 0;
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return 0;
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}
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}
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PUBLIC void irq_8259_unmask(int irq)
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{
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unsigned ctl_mask = irq < 8 ? INT_CTLMASK : INT2_CTLMASK;
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outb(ctl_mask, inb(ctl_mask) & ~(1 << (irq & 0x7)));
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}
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PUBLIC void irq_8259_mask(int irq)
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{
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unsigned ctl_mask = irq < 8 ? INT_CTLMASK : INT2_CTLMASK;
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outb(ctl_mask, inb(ctl_mask) | (1 << (irq & 0x7)));
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}
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@ -24,8 +24,6 @@
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.globl phys_insb /* likewise byte by byte */
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.globl phys_insb /* likewise byte by byte */
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.globl phys_outsw /* transfer data from memory to (disk controller) port */
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.globl phys_outsw /* transfer data from memory to (disk controller) port */
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.globl phys_outsb /* likewise byte by byte */
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.globl phys_outsb /* likewise byte by byte */
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.globl intr_unmask /* enable an irq at the 8259 controller */
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.globl intr_mask /* disable an irq */
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.globl phys_copy /* copy data from anywhere to anywhere in memory */
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.globl phys_copy /* copy data from anywhere to anywhere in memory */
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.globl phys_copy_fault /* phys_copy pagefault */
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.globl phys_copy_fault /* phys_copy pagefault */
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.globl phys_memset /* write pattern anywhere in memory */
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.globl phys_memset /* write pattern anywhere in memory */
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@ -294,90 +292,6 @@ phys_outsb:
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ret
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ret
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/*==========================================================================*/
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/* intr_unmask */
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/*==========================================================================*/
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/*
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* PUBLIC void intr_unmask(irq_hook_t *hook)
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* Enable an interrupt request line by clearing an 8259 bit.
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* Equivalent C code for hook->irq < 8:
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* if ((irq_actids[hook->irq] &= ~hook->id) == 0)
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* outb(INT_CTLMASK, inb(INT_CTLMASK) & ~(1 << irq));
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*/
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.balign 16
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intr_unmask:
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push %ebp
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mov %esp, %ebp
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pushf
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cli
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mov 8(%ebp), %eax /* hook */
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mov 8(%eax), %ecx /* irq */
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mov 12(%eax), %eax /* id bit */
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not %eax
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and %eax, irq_actids(,%ecx) /* clear this id bit */
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jne en_done /* still masked by other handlers? */
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movb $~1, %ah
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rolb %cl, %ah /* ah = ~(1 << (irq % 8)) */
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mov $INT_CTLMASK, %edx /* enable irq < 8 at the master 8259 */
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cmpb $8, %cl
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jb 0f
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mov $INT2_CTLMASK, %edx /* enable irq >= 8 at the slave 8259 */
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0:
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inb %dx
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andb %ah, %al
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outb %dx /* clear bit at the 8259 */
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en_done:
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popf
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leave
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ret
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/*==========================================================================*/
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/* intr_mask */
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/*==========================================================================*/
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/*
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* PUBLIC int intr_mask(irq_hook_t *hook)
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* Disable an interrupt request line by setting an 8259 bit.
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* Equivalent C code for irq < 8:
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* irq_actids[hook->irq] |= hook->id;
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* outb(INT_CTLMASK, inb(INT_CTLMASK) | (1 << irq));
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* Returns true iff the interrupt was not already disabled.
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*/
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.balign 16
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intr_mask:
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push %ebp
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mov %esp, %ebp
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pushf
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cli
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mov 8(%ebp), %eax /* hook */
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mov 8(%eax), %ecx /* irq */
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mov 12(%eax), %eax /* id bit */
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or %eax, irq_actids(,%ecx) /* set this id bit */
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movb $1, %ah
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rolb %cl, %ah /* ah = (1 << (irq % 8)) */
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mov $INT_CTLMASK, %edx /* disable irq < 8 at the master 8259 */
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cmpb $8, %cl
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jb 0f
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mov $INT2_CTLMASK, %edx /* disable irq >= 8 at the slave 8259 */
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0:
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inb %dx
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testb %ah, %al
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jne dis_already /* already disabled? */
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orb %ah, %al
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outb %dx /* set bit at the 8259 */
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mov $1, %eax /* disabled by this function */
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popf
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leave
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ret
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dis_already:
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xor %eax, %eax /* already disabled */
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popf
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leave
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ret
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/*===========================================================================*/
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/*===========================================================================*/
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/* phys_copy */
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/* phys_copy */
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/*===========================================================================*/
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/*===========================================================================*/
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@ -248,15 +248,10 @@ csinit:
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/* Note this is a macro, it just looks like a subroutine. */
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_master(irq) \
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#define hwint_master(irq) \
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call save /* save interrupted process state */;\
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call save /* save interrupted process state */;\
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push (irq_handlers+4*irq) /* irq_handlers[irq] */;\
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push $irq ;\
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call intr_handle /* intr_handle(irq_handlers[irq]) */;\
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call irq_handle /* irq_handle(irq) */;\
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pop %ecx ;\
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pop %ecx ;\
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cmp $0, (irq_actids+4*irq) /* interrupt still active? */;\
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movb $END_OF_INT, %al ;\
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jz 0f ;\
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inb $INT_CTLMASK /* get current mask */ ;\
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orb $(1<<irq), %al /* mask irq */ ;\
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outb $INT_CTLMASK /* disable the irq */;\
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0: movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable master 8259 */;\
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outb $INT_CTL /* reenable master 8259 */;\
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ret /* restart (another) process */
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ret /* restart (another) process */
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/* Note this is a macro, it just looks like a subroutine. */
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/* Note this is a macro, it just looks like a subroutine. */
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#define hwint_slave(irq) \
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#define hwint_slave(irq) \
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call save /* save interrupted process state */;\
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call save /* save interrupted process state */;\
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push (irq_handlers+4*irq) /* irq_handlers[irq] */;\
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push $irq ;\
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call intr_handle /* intr_handle(irq_handlers[irq]) */;\
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call irq_handle /* irq_handle(irq) */;\
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pop %ecx ;\
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pop %ecx ;\
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cmp $0, (irq_actids+4*irq) /* interrupt still active? */;\
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movb $END_OF_INT, %al ;\
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jz 0f ;\
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inb $INT2_CTLMASK ;\
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orb $(1<<(irq-8)), %al ;\
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outb $INT2_CTLMASK /* disable the irq */;\
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0: movb $END_OF_INT, %al ;\
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outb $INT_CTL /* reenable master 8259 */;\
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outb $INT_CTL /* reenable master 8259 */;\
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outb $INT2_CTL /* reenable slave 8259 */;\
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outb $INT2_CTL /* reenable slave 8259 */;\
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ret /* restart (another) process */
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ret /* restart (another) process */
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@ -6,7 +6,7 @@
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*
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*
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* put_irq_handler: register an interrupt handler.
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* put_irq_handler: register an interrupt handler.
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* rm_irq_handler: deregister an interrupt handler.
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* rm_irq_handler: deregister an interrupt handler.
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* intr_handle: handle a hardware interrupt.
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* irq_handle: handle a hardware interrupt.
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* called by the system dependent part when an
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* called by the system dependent part when an
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* external interrupt occures.
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* external interrupt occures.
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* enable_irq: enable hook for IRQ.
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* enable_irq: enable hook for IRQ.
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#include <minix/com.h>
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#include <minix/com.h>
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#include <archconst.h>
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#include <archconst.h>
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#include "arch/i386/hw_intr.h"
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/* number of lists of IRQ hooks, one list per supported line. */
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/* number of lists of IRQ hooks, one list per supported line. */
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PUBLIC irq_hook_t* irq_handlers[NR_IRQ_VECTORS] = {0};
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PUBLIC irq_hook_t* irq_handlers[NR_IRQ_VECTORS] = {0};
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/*===========================================================================*
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/*===========================================================================*
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*
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*
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* Internal this activates the line or source of the given interrupt.
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* Internal this activates the line or source of the given interrupt.
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*/
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*/
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intr_unmask(hook);
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if((irq_actids[hook->irq] &= ~hook->id) == 0) {
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hw_intr_unmask(hook->irq);
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}
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}
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}
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/*===========================================================================*
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/*===========================================================================*
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minix_panic("invalid call to rm_irq_handler", irq);
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minix_panic("invalid call to rm_irq_handler", irq);
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/* disable the irq. */
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/* disable the irq. */
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intr_mask(hook);
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irq_actids[hook->irq] |= hook->id;
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hw_intr_mask(hook->irq);
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/* remove the hook. */
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/* remove the hook. */
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line = &irq_handlers[irq];
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line = &irq_handlers[irq];
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}
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}
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/*===========================================================================*
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/*===========================================================================*
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* intr_handle *
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* irq_handle *
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*===========================================================================*/
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*===========================================================================*/
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PUBLIC void intr_handle(irq_hook_t *hook)
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/*
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{
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* The function first disables interrupt is need be and restores the state at
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/* Call the interrupt handlers for an interrupt with the given hook list.
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* the end. Before returning, it unmasks the IRQ if and only if all active ID
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* The assembly part of the handler has already masked the IRQ, reenabled the
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* bits are cleared, and restart a process.
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* controller(s) and enabled interrupts.
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*/
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*/
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PUBLIC void irq_handle(int irq)
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{
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irq_hook_t * hook;
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/* here we need not to get this IRQ until all the handlers had a say */
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hw_intr_mask(irq);
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hook = irq_handlers[irq];
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/* Call list of handlers for an IRQ. */
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/* Call list of handlers for an IRQ. */
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while( hook != NULL ) {
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while( hook != NULL ) {
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/* For each handler in the list, mark it active by setting its ID bit,
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/* For each handler in the list, mark it active by setting its ID bit,
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* call the function, and unmark it if the function returns true.
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* call the function, and unmark it if the function returns true.
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*/
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*/
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irq_actids[hook->irq] |= hook->id;
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irq_actids[irq] |= hook->id;
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/* Call the hooked function. */
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/* Call the hooked function. */
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if( (*hook->handler)(hook) )
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if( (*hook->handler)(hook) )
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hook = hook->next;
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hook = hook->next;
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}
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}
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/* The assembly code will now disable interrupts, unmask the IRQ if and only
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/* reenable the IRQ only if there is no active handler */
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* if all active ID bits are cleared, and restart a process.
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if (irq_actids[irq] == 0)
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*/
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hw_intr_unmask(irq);
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}
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}
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/* Enable/Disable a interrupt line. */
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/* Enable/Disable a interrupt line. */
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irq_hook_t* hook;
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irq_hook_t* hook;
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{
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{
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if((irq_actids[hook->irq] &= ~hook->id) == 0) {
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if((irq_actids[hook->irq] &= ~hook->id) == 0) {
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intr_unmask(hook);
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hw_intr_unmask(hook->irq);
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return;
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}
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}
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}
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}
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if(irq_actids[hook->irq] & hook->id) /* already disabled */
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if(irq_actids[hook->irq] & hook->id) /* already disabled */
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return 0;
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return 0;
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irq_actids[hook->irq] |= hook->id;
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irq_actids[hook->irq] |= hook->id;
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intr_mask(hook);
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hw_intr_mask(hook->irq);
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return TRUE;
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return TRUE;
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}
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}
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_PROTOTYPE( void vtimer_check, (struct proc *rp) );
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_PROTOTYPE( void vtimer_check, (struct proc *rp) );
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/* interrupt.c */
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/* interrupt.c */
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_PROTOTYPE( void intr_handle, (irq_hook_t *hook) );
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_PROTOTYPE( void put_irq_handler, (irq_hook_t *hook, int irq,
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_PROTOTYPE( void put_irq_handler, (irq_hook_t *hook, int irq,
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irq_handler_t handler) );
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irq_handler_t handler) );
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_PROTOTYPE( void rm_irq_handler, (irq_hook_t *hook) );
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_PROTOTYPE( void rm_irq_handler, (irq_hook_t *hook) );
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_PROTOTYPE( void clock_stop, (void) );
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_PROTOTYPE( void clock_stop, (void) );
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_PROTOTYPE( int intr_init, (int) );
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_PROTOTYPE( int intr_init, (int) );
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_PROTOTYPE( int intr_disabled, (void) );
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_PROTOTYPE( int intr_disabled, (void) );
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_PROTOTYPE( int intr_unmask, (irq_hook_t* hook) );
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_PROTOTYPE( int intr_mask, (irq_hook_t* hook) );
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_PROTOTYPE( void idle_task, (void) );
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_PROTOTYPE( void idle_task, (void) );
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_PROTOTYPE( void arch_init, (void) );
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_PROTOTYPE( void arch_init, (void) );
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_PROTOTYPE( void ser_putc, (char) );
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_PROTOTYPE( void ser_putc, (char) );
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