gem5/arch
Kevin Lim fc664f7ca6 Merge ktlim@zizzer:/bk/m5
into  zamp.eecs.umich.edu:/z/ktlim2/m5-shadowregs

--HG--
extra : convert_revision : 979ab1fc4e1ea4d6a78ac9a2ec894f0be4feb01d
2006-03-03 16:04:34 -05:00
..
alpha Merge ktlim@zizzer:/bk/m5 2006-03-03 16:04:34 -05:00
mips Merge zizzer.eecs.umich.edu:/z/m5/Bitkeeper/m5 2006-02-24 08:52:38 -05:00
sparc Create a Builder object for .isa files in arch/SConscript. 2006-02-23 14:31:15 -05:00
isa_parser.py Changes to support automatic renaming of the shadow registers at decode time. This requires using an ExtMachInst (uint64_t) instead of the normal MachInst; the ExtMachInst is packed with extra decode context information. In the case of Alpha, the PAL mode is included. 2006-03-03 15:28:25 -05:00
isa_specific.hh Auto-generate arch/foo.hh "switch headers" in scons. 2006-02-22 22:22:06 -05:00
SConscript Merge gblack@m5.eecs.umich.edu:/bk/multiarch 2006-02-28 06:13:35 -05:00