gem5/tests/quick/se/50.memtest/ref/alpha/linux/memtest-ruby-MOESI_hammer/ruby.stats
Steve Reinhardt fbc1feb39a tests: update reference outputs
Apparently only stats.txt was updated the last time, so
this changeset updates other reference output files
(config.ini, simout, simerr, ruby.stats) so that
test output diffs should not be cluttered with irrelevant
changes.  There are a few stats.txt updates too, but
they are in the minority.
2013-09-28 15:25:17 -04:00

86 lines
6.9 KiB
Plaintext

Real time: Sep/22/2013 05:19:16
Profiler Stats
--------------
Elapsed_time_in_seconds: 98
Elapsed_time_in_minutes: 1.63333
Elapsed_time_in_hours: 0.0272222
Elapsed_time_in_days: 0.00113426
Virtual_time_in_seconds: 98.86
Virtual_time_in_minutes: 1.64767
Virtual_time_in_hours: 0.0274611
Virtual_time_in_days: 0.00114421
Ruby_current_time: 5795833
Ruby_start_time: 0
Ruby_cycles: 5795833
mbytes_resident: 69.3711
mbytes_total: 252.59
resident_ratio: 0.274639
Busy Controller Counts:
L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
Directory-0:0
Busy Bank Count:0
sequencer_requests_outstanding: [binsize: 1 max: 16 count: 618244 average: 15.9984 | standard deviation: 0.126664 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 618124 ]
All Non-Zero Cycle Demand Cache Accesses
----------------------------------------
latency: [binsize: 512 max: 5202 count: 618116 average: 1200.02 | standard deviation: 895.776 | 206463 111230 74558 89791 83677 39903 10406 1863 212 12 1 ]
latency: LD: [binsize: 512 max: 5202 count: 401404 average: 1200.21 | standard deviation: 896.108 | 134246 71985 48401 58391 54272 25955 6789 1223 135 6 1 ]
latency: ST: [binsize: 256 max: 4722 count: 216712 average: 1199.68 | standard deviation: 895.164 | 29101 43116 23951 15294 13091 13066 14962 16438 16050 13355 8767 5181 2520 1097 473 167 59 18 6 ]
hit latency: [binsize: 128 max: 1794 count: 737 average: 133.263 | standard deviation: 176.676 | 450 150 85 24 11 9 4 2 1 0 0 0 0 0 1 ]
hit latency: LD: [binsize: 128 max: 1794 count: 496 average: 129.788 | standard deviation: 179.341 | 309 100 54 18 5 3 3 2 1 0 0 0 0 0 1 ]
hit latency: ST: [binsize: 64 max: 816 count: 241 average: 140.415 | standard deviation: 171.208 | 114 27 29 21 19 12 6 0 1 5 3 3 1 ]
hit latency: L1Cache: [binsize: 1 max: 2 count: 138 average: 2 | standard deviation: 0 | 0 0 138 ]
hit latency: L2Cache: [binsize: 128 max: 1794 count: 599 average: 163.504 | standard deviation: 183.1 | 312 150 85 24 11 9 4 2 1 0 0 0 0 0 1 ]
hit latency: LD: L1Cache: [binsize: 1 max: 2 count: 88 average: 2 | standard deviation: 0 | 0 0 88 ]
hit latency: LD: L2Cache: [binsize: 128 max: 1794 count: 408 average: 157.35 | standard deviation: 186.614 | 221 100 54 18 5 3 3 2 1 0 0 0 0 0 1 ]
hit latency: ST: L1Cache: [binsize: 1 max: 2 count: 50 average: 2 | standard deviation: 0 | 0 0 50 ]
hit latency: ST: L2Cache: [binsize: 64 max: 816 count: 191 average: 176.649 | standard deviation: 175.112 | 64 27 29 21 19 12 6 0 1 5 3 3 1 ]
miss latency: [binsize: 512 max: 5202 count: 617379 average: 1201.3 | standard deviation: 895.531 | 205754 111204 74557 89790 83677 39903 10406 1863 212 12 1 ]
miss latency: LD: [binsize: 512 max: 5202 count: 400908 average: 1201.53 | standard deviation: 895.848 | 133765 71972 48400 58390 54272 25955 6789 1223 135 6 1 ]
miss latency: ST: [binsize: 256 max: 4722 count: 216471 average: 1200.86 | standard deviation: 894.946 | 28910 43079 23939 15293 13091 13066 14962 16438 16050 13355 8767 5181 2520 1097 473 167 59 18 6 ]
miss latency: L1Cache: [binsize: 256 max: 4219 count: 19877 average: 1068.63 | standard deviation: 891.446 | 5077 2989 1592 1188 1142 1304 1458 1540 1389 1009 606 350 137 58 24 12 2 ]
miss latency: L1Cache::issue_to_initial_request: [binsize: 256 max: 4183 count: 19438 average: 985.051 | standard deviation: 886.077 | 6341 2234 1289 1099 1146 1310 1504 1457 1314 844 490 245 99 41 16 8 1 ]
miss latency: L1Cache::initial_to_forward_request: [binsize: 64 max: 950 count: 19438 average: 56.6967 | standard deviation: 97.3601 | 14693 1461 1375 751 555 258 162 92 47 22 13 6 1 1 1 ]
miss latency: L1Cache::forward_to_first_response: [binsize: 4 max: 41 count: 19438 average: 25.9291 | standard deviation: 2.2142 | 0 0 0 0 0 0 14855 4189 347 43 4 ]
miss latency: L1Cache::first_response_to_completion: [binsize: 1 max: 17 count: 19438 average: 1.88399 | standard deviation: 1.91661 | 4577 4980 4812 2734 633 542 592 141 210 48 64 58 10 15 8 9 3 2 ]
incomplete times: 439
miss latency: Directory: [binsize: 512 max: 5202 count: 597502 average: 1205.71 | standard deviation: 895.33 | 197688 108424 72111 86792 81279 38947 10211 1827 210 12 1 ]
miss latency: Directory::issue_to_initial_request: [binsize: 256 max: 4586 count: 597502 average: 986.665 | standard deviation: 885.753 | 193643 68787 39212 35303 35738 39433 45438 47273 38525 26051 15408 7420 3197 1356 482 169 56 11 ]
miss latency: Directory::initial_to_forward_request: [binsize: 64 max: 917 count: 597502 average: 10.3803 | standard deviation: 16.8053 | 594834 590 716 527 327 237 99 81 36 30 12 6 4 2 1 ]
miss latency: Directory::forward_to_first_response: [binsize: 4 max: 46 count: 597502 average: 26.1255 | standard deviation: 2.2256 | 0 0 0 0 0 0 438342 145040 12848 1182 86 4 ]
miss latency: Directory::first_response_to_completion: [binsize: 64 max: 1271 count: 597502 average: 182.537 | standard deviation: 133.941 | 119862 132516 102192 101613 56256 35072 21796 12009 7538 3919 2337 1153 649 299 168 63 31 20 4 5 ]
incomplete times: 0
miss latency: LD: L1Cache: [binsize: 256 max: 4219 count: 12936 average: 1063.32 | standard deviation: 892.035 | 3354 1932 1034 781 733 849 939 995 893 646 401 226 90 38 14 10 1 ]
miss latency: LD: Directory: [binsize: 512 max: 5202 count: 387972 average: 1206.14 | standard deviation: 895.609 | 128479 70157 46818 56456 52733 25328 6661 1199 134 6 1 ]
miss latency: ST: L1Cache: [binsize: 256 max: 4104 count: 6941 average: 1078.54 | standard deviation: 890.328 | 1723 1057 558 407 409 455 519 545 496 363 205 124 47 20 10 2 1 ]
miss latency: ST: Directory: [binsize: 256 max: 4722 count: 209530 average: 1204.91 | standard deviation: 894.815 | 27187 42022 23381 14886 12682 12611 14443 15893 15554 12992 8562 5057 2473 1077 463 165 58 18 6 ]
Request vs. RubySystem State Profile
--------------------------------
Message Delayed Cycles
----------------------
Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]