Brad Beckmann f9fa242f42 slicc: improved stalling support in protocols ... Adds features to allow protocols to reschedule controllers when conditionally stalling within inport logic or actions. Also insures that resource and protocol stalls are re-evaluated the next cycle.		2015-07-20 09:15:18 -05:00
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arch	x86: x86 instruction-implementation bug fixes	2015-07-20 09:15:18 -05:00
base	base: Add serialization support to Pixels and FrameBuffer	2015-07-07 09:51:04 +01:00
cpu	cpu: Fixed a bug on where to fetch the next instruction from	2015-07-20 09:15:18 -05:00
dev	dev: add support for multi gem5 runs	2015-07-15 19:53:50 -05:00
doc	cpu: `Minor' in-order CPU model	2014-07-23 16:09:04 -05:00
doxygen	MEM: Put memory system document into doxygen	2012-09-25 11:49:41 -05:00
kern	style: change Process function calls to use camelCase	2015-07-24 12:25:23 -07:00
mem	slicc: improved stalling support in protocols	2015-07-20 09:15:18 -05:00
proto	cpu: add support for outputing a protobuf formatted CPU trace	2015-02-16 03:32:38 -05:00
python	sim: Decouple draining from the SimObject hierarchy	2015-07-07 09:51:05 +01:00
sim	syscall: Add readlink to x86 with special case /proc/self/exe	2015-07-20 09:15:18 -05:00
unittest	base: Redesign internal frame buffer handling	2015-05-23 13:37:03 +01:00
Doxyfile	Doxygen: Update the version of the Doxyfile	2012-10-11 06:38:42 -04:00
SConscript	scons: Bump compiler requirement to gcc >= 4.7 and clang >= 3.1	2015-07-03 10:14:15 -04:00