gem5/src/arch/x86/regs
Nilay Vaish 6369df59c8 x86: Add a separate register for D flag bit
The D flag bit is part of the cc flag bit register currently. But since it
is not being used any where in the implementation, it creates an unnecessary
dependency. Hence, it is being moved to a separate register.
2012-09-11 09:25:43 -05:00
..
apic.hh X86: Create a directory for files that define register indexes. 2010-08-23 16:14:24 -07:00
float.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
int.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00
misc.hh x86: Add a separate register for D flag bit 2012-09-11 09:25:43 -05:00
msr.cc X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
msr.hh X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
SConscript X86: Move the MSR lookup table out of the TLB and into its own file. 2011-09-23 02:42:22 -07:00
segment.hh gcc: Clean-up of non-C++0x compliant code, first steps 2012-03-19 06:36:09 -04:00