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gem5/src/cpu/ozone
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Nathan Binkert d55b25cde6 Move all of the parameters of the Root SimObject so they are 
directly configured by python.  Move stuff from root.(cc|hh) to
core.(cc|hh) since it really belogs there now.
In the process, simplify how ticks are used in the python code.

--HG--
extra : convert_revision : cf82ee1ea20f9343924f30bacc2a38d4edee8df3
2007-03-06 11:13:43 -08:00
..
back_end.cc Update copyright. 2006-06-07 16:02:55 -04:00
back_end.hh Include the right version of faults.hh 2006-10-28 04:00:24 -04:00
back_end_impl.hh Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable(). 2006-10-08 14:48:24 -07:00
base_dyn_inst.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
bpred_unit.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
checker_builder.cc Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 2006-11-01 16:44:45 -05:00
cpu.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
cpu.hh Implement a stub nnpc for alpha that is read only as npc+4. 2006-12-28 14:27:45 -05:00
cpu_builder.cc Fix typo. 2006-11-12 23:31:29 -05:00
cpu_impl.hh eliminate cpu checkInterrupts bool, it is redundant and unnecessary. 2007-01-26 12:51:07 -05:00
dyn_inst.cc Update copyright. 2006-06-07 16:02:55 -04:00
dyn_inst.hh Rename the StaticInst-based (read|set)(Int|Float)Reg methods to (read|set)(Int|Float)RegOperand to distinguish from non-StaticInst version. 2006-12-12 09:58:40 -08:00
dyn_inst_impl.hh Put kernel_stats back into arch. 2006-11-07 22:34:34 -05:00
ea_list.cc Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
ea_list.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
front_end.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
front_end.hh little fixes i noticed while searching for reason for address range issues (but these weren't the cause of the problem). 2006-12-15 17:55:47 -05:00
front_end_impl.hh Updates to support new interrupt processing and removal of PcPAL. 2006-11-12 20:15:30 -05:00
inorder_back_end.cc Update copyright. 2006-06-07 16:02:55 -04:00
inorder_back_end.hh Get rid of unused lock code. 2006-12-12 02:21:03 -05:00
inorder_back_end_impl.hh eliminate cpu checkInterrupts bool, it is redundant and unnecessary. 2007-01-26 12:51:07 -05:00
inst_queue.cc Update copyright. 2006-06-07 16:02:55 -04:00
inst_queue.hh Update copyright. 2006-06-07 16:02:55 -04:00
inst_queue_impl.hh Move all of the parameters of the Root SimObject so they are 2007-03-06 11:13:43 -08:00
lsq_unit.cc Update copyright. 2006-06-07 16:02:55 -04:00
lsq_unit.hh Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable(). 2006-10-08 14:48:24 -07:00
lsq_unit_impl.hh Replace tests of LOCKED/UNCACHEABLE flags with isLocked()/isUncacheable(). 2006-10-08 14:48:24 -07:00
lw_back_end.cc Update copyright. 2006-06-07 16:02:55 -04:00
lw_back_end.hh Include the right version of faults.hh 2006-10-28 04:00:24 -04:00
lw_back_end_impl.hh Got rid of "inPalMode". Some places are still effectively checking if they are in PAL mode, however. 2006-11-03 04:25:33 -05:00
lw_lsq.cc Update copyright. 2006-06-07 16:02:55 -04:00
lw_lsq.hh little fixes i noticed while searching for reason for address range issues (but these weren't the cause of the problem). 2006-12-15 17:55:47 -05:00
lw_lsq_impl.hh some forgotten commits 2007-02-12 18:40:08 -05:00
null_predictor.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
ozone_base_dyn_inst.cc Split off instantiation into separate CC files for each of the models. This makes it easier to be able to specify only certain CPU models. 2006-06-17 21:39:25 -04:00
ozone_impl.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
rename_table.cc Changes to get OzoneCPU to compile once more. 2006-06-22 23:33:26 -04:00
rename_table.hh Update copyright. 2006-06-07 16:02:55 -04:00
rename_table_impl.hh Update copyright. 2006-06-07 16:02:55 -04:00
simple_base_dyn_inst.cc Split off instantiation into separate CC files for each of the models. This makes it easier to be able to specify only certain CPU models. 2006-06-17 21:39:25 -04:00
simple_cpu_builder.cc Adjustments for the AlphaTLB changing to AlphaISA::TLB and changing register file functions to not take faults 2006-11-01 16:44:45 -05:00
simple_impl.hh Cleaned up include files and got rid of many using directives in header files. 2006-08-15 05:07:15 -04:00
simple_params.hh Merge zizzer.eecs.umich.edu:/bk/newmem/ 2006-11-01 19:00:59 -05:00
thread_state.hh Fix compile error. 2006-11-07 13:53:49 -05:00