..
resources
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
comm.hh
inorder: stage width as a python parameter
2011-02-04 00:08:18 -05:00
cpu.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
cpu.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
first_stage.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
first_stage.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
inorder_cpu_builder.cc
includes: sort all includes
2011-04-15 10:44:06 -07:00
inorder_dyn_inst.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
inorder_dyn_inst.hh
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
inorder_trace.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
inorder_trace.hh
Make commenting on close namespace brackets consistent.
2011-01-03 14:35:43 -08:00
InOrderCPU.py
inorder: add a fetch buffer to fetch unit
2011-02-04 00:08:22 -05:00
InOrderTrace.py
InOrder: Import new inorder CPU model from MIPS.
2009-02-10 15:49:29 -08:00
params.hh
Remove unused functions/comments cluttering up the code.
2009-03-04 13:17:08 -05:00
pipeline_stage.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
pipeline_stage.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
pipeline_traits.5stage.cc
includes: sort all includes
2011-04-15 10:44:06 -07:00
pipeline_traits.5stage.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.cc
includes: sort all includes
2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.smt2.cc
includes: sort all includes
2011-04-15 10:44:06 -07:00
pipeline_traits.9stage.smt2.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
pipeline_traits.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
reg_dep_map.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
reg_dep_map.hh
inorder: cleanup in destructors
2011-02-18 14:29:26 -05:00
resource.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
resource.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
resource_pool.9stage.cc
includes: sort all includes
2011-04-15 10:44:06 -07:00
resource_pool.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
resource_pool.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
resource_sked.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
resource_sked.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
SConscript
inorder: clean up the old way of inst. scheduling
2011-02-12 10:14:48 -05:00
SConsopts
cpu_models: get rid of cpu_models.py and move the stuff into SCons
2010-02-26 18:14:48 -08:00
thread_context.cc
trace: reimplement the DTRACE function so it doesn't use a vector
2011-04-15 10:44:32 -07:00
thread_context.hh
includes: sort all includes
2011-04-15 10:44:06 -07:00
thread_state.cc
includes: sort all includes
2011-04-15 10:44:06 -07:00
thread_state.hh
ISA,CPU,etc: Create an ISA defined PC type that abstracts out ISA behaviors.
2010-10-31 00:07:20 -07:00