cfc4a99982
This patch makes all the register index flattening methods const for all the ISAs. As part of this, readMiscRegNoEffect for ARM is also made const.
111 lines
3.3 KiB
C++
111 lines
3.3 KiB
C++
/*
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* Copyright (c) 2009 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_X86_ISA_HH__
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#define __ARCH_X86_ISA_HH__
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#include <iostream>
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#include <string>
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#include "arch/x86/regs/float.hh"
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#include "arch/x86/regs/misc.hh"
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#include "arch/x86/registers.hh"
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#include "base/types.hh"
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#include "sim/sim_object.hh"
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class Checkpoint;
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class EventManager;
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class ThreadContext;
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struct X86ISAParams;
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namespace X86ISA
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{
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class ISA : public SimObject
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{
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protected:
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MiscReg regVal[NUM_MISCREGS];
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void updateHandyM5Reg(Efer efer, CR0 cr0,
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SegAttr csAttr, SegAttr ssAttr, RFLAGS rflags,
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ThreadContext *tc);
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public:
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typedef X86ISAParams Params;
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void clear();
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ISA(Params *p);
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const Params *params() const;
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MiscReg readMiscRegNoEffect(int miscReg);
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MiscReg readMiscReg(int miscReg, ThreadContext *tc);
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void setMiscRegNoEffect(int miscReg, MiscReg val);
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void setMiscReg(int miscReg, MiscReg val, ThreadContext *tc);
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int
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flattenIntIndex(int reg) const
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{
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return reg & ~IntFoldBit;
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}
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int
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flattenFloatIndex(int reg) const
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{
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if (reg >= NUM_FLOATREGS) {
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reg = FLOATREG_STACK(reg - NUM_FLOATREGS,
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regVal[MISCREG_X87_TOP]);
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}
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return reg;
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}
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int
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flattenCCIndex(int reg) const
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{
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return reg;
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}
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int
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flattenMiscIndex(int reg) const
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{
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return reg;
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}
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void serialize(std::ostream &os);
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void unserialize(Checkpoint *cp, const std::string §ion);
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void startup(ThreadContext *tc);
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/// Explicitly import the otherwise hidden startup
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using SimObject::startup;
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};
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}
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#endif
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