1036 lines
34 KiB
Text
1036 lines
34 KiB
Text
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================ Begin RubySystem Configuration Print ================
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RubySystem config:
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random_seed: 1234
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randomization: 0
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cycle_period: 1
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block_size_bytes: 64
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block_size_bits: 6
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memory_size_bytes: 134217728
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memory_size_bits: 27
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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topology:
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virtual_net_0: active, ordered
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virtual_net_1: active, unordered
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virtual_net_2: active, unordered
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virtual_net_3: active, ordered
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virtual_net_4: active, unordered
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virtual_net_5: active, ordered
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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Real time: May/08/2012 15:36:42
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Profiler Stats
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--------------
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Elapsed_time_in_seconds: 0
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Elapsed_time_in_minutes: 0
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Elapsed_time_in_hours: 0
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Elapsed_time_in_days: 0
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Virtual_time_in_seconds: 0.23
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Virtual_time_in_minutes: 0.00383333
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Virtual_time_in_hours: 6.38889e-05
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Virtual_time_in_days: 2.66204e-06
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Ruby_current_time: 87899
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Ruby_start_time: 0
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Ruby_cycles: 87899
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mbytes_resident: 45.1094
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mbytes_total: 217.598
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resident_ratio: 0.207306
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ruby_cycles_executed: [ 87900 ]
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Busy Controller Counts:
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L1Cache-0:0
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L2Cache-0:0
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Directory-0:0
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Busy Bank Count:0
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sequencer_requests_outstanding: [binsize: 1 max: 1 count: 3295 average: 1 | standard deviation: 0 | 0 3295 ]
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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miss_latency: [binsize: 2 max: 307 count: 3294 average: 25.6846 | standard deviation: 58.8214 | 0 2776 0 0 0 0 0 0 0 0 6 2 62 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 4 58 48 98 72 79 0 1 2 13 9 10 7 26 0 1 0 0 1 1 0 1 1 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 2 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD: [binsize: 2 max: 307 count: 415 average: 65.2795 | standard deviation: 81.9739 | 0 233 0 0 0 0 0 0 0 0 0 1 32 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 16 14 37 32 18 0 0 0 9 2 2 2 8 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST: [binsize: 2 max: 307 count: 294 average: 34.5782 | standard deviation: 69.4748 | 0 228 0 0 0 0 0 0 0 0 6 1 7 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 5 15 8 5 0 0 0 0 1 1 0 5 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_IFETCH: [binsize: 2 max: 277 count: 2585 average: 18.3164 | standard deviation: 49.7019 | 0 2315 0 0 0 0 0 0 0 0 0 0 23 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 36 29 46 32 56 0 1 2 4 6 7 5 13 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache: [binsize: 1 max: 2 count: 2776 average: 2 | standard deviation: 0 | 0 0 2776 ]
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miss_latency_L2Cache: [binsize: 1 max: 25 count: 70 average: 24.6 | standard deviation: 1.16096 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 2 0 62 ]
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miss_latency_Directory: [binsize: 2 max: 307 count: 448 average: 172.614 | standard deviation: 19.1957 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 4 58 48 98 72 79 0 1 2 13 9 10 7 26 0 1 0 0 1 1 0 1 1 2 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 2 0 0 0 0 0 0 0 1 0 0 0 0 0 1 0 0 2 0 0 0 0 0 0 0 0 0 0 1 2 0 0 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_initial_forward_request: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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imcomplete_wCC_Times: 0
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miss_latency_dir_issue_to_initial_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_initial_forward_request: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 0 count: 1 average: 0 | standard deviation: 0 | 1 ]
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miss_latency_dir_first_response_to_completion: [binsize: 1 max: 169 count: 1 average: 169 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 ]
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imcomplete_dir_Times: 447
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miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 233 average: 2 | standard deviation: 0 | 0 0 233 ]
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miss_latency_LD_L2Cache: [binsize: 1 max: 25 count: 33 average: 24.9394 | standard deviation: 0.353553 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 32 ]
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miss_latency_LD_Directory: [binsize: 2 max: 307 count: 149 average: 173.168 | standard deviation: 20.2876 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 16 14 37 32 18 0 0 0 9 2 2 2 8 0 0 0 0 1 0 0 0 0 1 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 228 average: 2 | standard deviation: 0 | 0 0 228 ]
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miss_latency_ST_L2Cache: [binsize: 1 max: 25 count: 14 average: 23.1429 | standard deviation: 2 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 0 1 0 7 ]
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miss_latency_ST_Directory: [binsize: 2 max: 307 count: 52 average: 180.5 | standard deviation: 35.1816 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 6 5 15 8 5 0 0 0 0 1 1 0 5 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_IFETCH_L1Cache: [binsize: 1 max: 2 count: 2315 average: 2 | standard deviation: 0 | 0 0 2315 ]
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miss_latency_IFETCH_L2Cache: [binsize: 1 max: 25 count: 23 average: 25 | standard deviation: 0 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 23 ]
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miss_latency_IFETCH_Directory: [binsize: 2 max: 277 count: 247 average: 170.619 | standard deviation: 12.1654 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 2 2 36 29 46 32 56 0 1 2 4 6 7 5 13 0 0 0 0 0 1 0 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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user_time: 0
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system_time: 0
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page_reclaims: 12024
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page_faults: 0
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swaps: 0
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block_inputs: 0
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block_outputs: 88
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Network Stats
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-------------
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total_msg_count_Request_Control: 2916 23328
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total_msg_count_Response_Data: 1344 96768
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total_msg_count_ResponseL2hit_Data: 210 15120
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total_msg_count_Response_Control: 3 24
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total_msg_count_Writeback_Data: 1758 126576
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total_msg_count_Writeback_Control: 1095 8760
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total_msgs: 7326 total_bytes: 270576
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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links_utilized_percent_switch_0: 2.75856
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links_utilized_percent_switch_0_link_0: 2.65248 bw: 16000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 2.86465 bw: 16000 base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Data: 448 32256 [ 0 0 0 0 448 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_ResponseL2hit_Data: 70 5040 [ 0 0 0 0 70 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Request_Control: 518 4144 [ 0 518 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Writeback_Data: 502 36144 [ 0 0 0 0 502 0 0 0 0 0 ] base_latency: 1
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switch_1_inlinks: 2
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switch_1_outlinks: 2
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links_utilized_percent_switch_1: 2.05975
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links_utilized_percent_switch_1_link_0: 2.86465 bw: 16000 base_latency: 1
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links_utilized_percent_switch_1_link_1: 1.25485 bw: 16000 base_latency: 1
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outgoing_messages_switch_1_link_0_Request_Control: 518 4144 [ 0 518 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_0_Writeback_Data: 502 36144 [ 0 0 0 0 502 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Request_Control: 454 3632 [ 0 0 454 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_ResponseL2hit_Data: 70 5040 [ 0 0 0 0 70 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Response_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Writeback_Data: 84 6048 [ 0 0 0 0 84 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_1_link_1_Writeback_Control: 365 2920 [ 0 0 0 0 365 0 0 0 0 0 ] base_latency: 1
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switch_2_inlinks: 2
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switch_2_outlinks: 2
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links_utilized_percent_switch_2: 1.59473
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links_utilized_percent_switch_2_link_0: 0.895915 bw: 16000 base_latency: 1
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links_utilized_percent_switch_2_link_1: 2.29354 bw: 16000 base_latency: 1
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outgoing_messages_switch_2_link_0_Request_Control: 454 3632 [ 0 0 454 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Writeback_Data: 84 6048 [ 0 0 0 0 84 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_0_Writeback_Control: 365 2920 [ 0 0 0 0 365 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_2_link_1_Response_Data: 448 32256 [ 0 0 0 0 448 0 0 0 0 0 ] base_latency: 1
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switch_3_inlinks: 3
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switch_3_outlinks: 3
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links_utilized_percent_switch_3: 2.13768
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links_utilized_percent_switch_3_link_0: 2.65248 bw: 16000 base_latency: 1
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links_utilized_percent_switch_3_link_1: 2.86465 bw: 16000 base_latency: 1
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links_utilized_percent_switch_3_link_2: 0.895915 bw: 16000 base_latency: 1
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outgoing_messages_switch_3_link_0_Response_Data: 448 32256 [ 0 0 0 0 448 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_0_ResponseL2hit_Data: 70 5040 [ 0 0 0 0 70 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_0_Response_Control: 1 8 [ 0 0 0 0 1 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_Request_Control: 518 4144 [ 0 518 0 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_1_Writeback_Data: 502 36144 [ 0 0 0 0 502 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_2_Request_Control: 454 3632 [ 0 0 454 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_2_Writeback_Data: 84 6048 [ 0 0 0 0 84 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_3_link_2_Writeback_Control: 365 2920 [ 0 0 0 0 365 0 0 0 0 0 ] base_latency: 1
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Cache Stats: system.l1_cntrl0.L1IcacheMemory
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system.l1_cntrl0.L1IcacheMemory_total_misses: 270
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system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 270
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system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
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system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
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system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
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system.l1_cntrl0.L1IcacheMemory_request_type_IFETCH: 100%
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system.l1_cntrl0.L1IcacheMemory_access_mode_type_Supervisor: 270 100%
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Cache Stats: system.l1_cntrl0.L1DcacheMemory
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system.l1_cntrl0.L1DcacheMemory_total_misses: 248
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system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 248
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system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
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system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
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system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
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system.l1_cntrl0.L1DcacheMemory_request_type_LD: 73.3871%
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system.l1_cntrl0.L1DcacheMemory_request_type_ST: 26.6129%
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system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 248 100%
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--- L1Cache ---
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- Event Counts -
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Load [415 ] 415
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Ifetch [2585 ] 2585
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Store [294 ] 294
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Atomic [0 ] 0
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L1_Replacement [504 ] 504
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Data_Shared [56 ] 56
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Data_Owner [0 ] 0
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Data_All_Tokens [462 ] 462
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Ack [1 ] 1
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Ack_All_Tokens [0 ] 0
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Transient_GETX [0 ] 0
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Transient_Local_GETX [0 ] 0
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Transient_GETS [0 ] 0
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Transient_Local_GETS [0 ] 0
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Transient_GETS_Last_Token [0 ] 0
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Transient_Local_GETS_Last_Token [0 ] 0
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Persistent_GETX [0 ] 0
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Persistent_GETS [0 ] 0
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Persistent_GETS_Last_Token [0 ] 0
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Own_Lock_or_Unlock [0 ] 0
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Request_Timeout [0 ] 0
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Use_TimeoutStarverX [0 ] 0
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Use_TimeoutStarverS [0 ] 0
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Use_TimeoutNoStarvers [461 ] 461
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Use_TimeoutNoStarvers_NoMig [0 ] 0
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- Transitions -
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NP Load [182 ] 182
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NP Ifetch [270 ] 270
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NP Store [58 ] 58
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NP Atomic [0 ] 0
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NP Data_Shared [0 ] 0
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NP Data_Owner [0 ] 0
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NP Data_All_Tokens [0 ] 0
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NP Ack [0 ] 0
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NP Transient_GETX [0 ] 0
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NP Transient_Local_GETX [0 ] 0
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NP Transient_GETS [0 ] 0
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NP Transient_Local_GETS [0 ] 0
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NP Persistent_GETX [0 ] 0
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NP Persistent_GETS [0 ] 0
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NP Persistent_GETS_Last_Token [0 ] 0
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NP Own_Lock_or_Unlock [0 ] 0
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I Load [0 ] 0
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I Ifetch [0 ] 0
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I Store [0 ] 0
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I Atomic [0 ] 0
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I L1_Replacement [0 ] 0
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I Data_Shared [0 ] 0
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I Data_Owner [0 ] 0
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I Data_All_Tokens [0 ] 0
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I Ack [0 ] 0
|
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I Transient_GETX [0 ] 0
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I Transient_Local_GETX [0 ] 0
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I Transient_GETS [0 ] 0
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I Transient_Local_GETS [0 ] 0
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I Transient_GETS_Last_Token [0 ] 0
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I Transient_Local_GETS_Last_Token [0 ] 0
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I Persistent_GETX [0 ] 0
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I Persistent_GETS [0 ] 0
|
|
I Persistent_GETS_Last_Token [0 ] 0
|
|
I Own_Lock_or_Unlock [0 ] 0
|
|
|
|
S Load [29 ] 29
|
|
S Ifetch [158 ] 158
|
|
S Store [8 ] 8
|
|
S Atomic [0 ] 0
|
|
S L1_Replacement [48 ] 48
|
|
S Data_Shared [0 ] 0
|
|
S Data_Owner [0 ] 0
|
|
S Data_All_Tokens [0 ] 0
|
|
S Ack [0 ] 0
|
|
S Transient_GETX [0 ] 0
|
|
S Transient_Local_GETX [0 ] 0
|
|
S Transient_GETS [0 ] 0
|
|
S Transient_Local_GETS [0 ] 0
|
|
S Transient_GETS_Last_Token [0 ] 0
|
|
S Transient_Local_GETS_Last_Token [0 ] 0
|
|
S Persistent_GETX [0 ] 0
|
|
S Persistent_GETS [0 ] 0
|
|
S Persistent_GETS_Last_Token [0 ] 0
|
|
S Own_Lock_or_Unlock [0 ] 0
|
|
|
|
O Load [0 ] 0
|
|
O Ifetch [0 ] 0
|
|
O Store [0 ] 0
|
|
O Atomic [0 ] 0
|
|
O L1_Replacement [0 ] 0
|
|
O Data_Shared [0 ] 0
|
|
O Data_All_Tokens [0 ] 0
|
|
O Ack [0 ] 0
|
|
O Ack_All_Tokens [0 ] 0
|
|
O Transient_GETX [0 ] 0
|
|
O Transient_Local_GETX [0 ] 0
|
|
O Transient_GETS [0 ] 0
|
|
O Transient_Local_GETS [0 ] 0
|
|
O Transient_GETS_Last_Token [0 ] 0
|
|
O Transient_Local_GETS_Last_Token [0 ] 0
|
|
O Persistent_GETX [0 ] 0
|
|
O Persistent_GETS [0 ] 0
|
|
O Persistent_GETS_Last_Token [0 ] 0
|
|
O Own_Lock_or_Unlock [0 ] 0
|
|
|
|
M Load [66 ] 66
|
|
M Ifetch [1161 ] 1161
|
|
M Store [29 ] 29
|
|
M Atomic [0 ] 0
|
|
M L1_Replacement [358 ] 358
|
|
M Transient_GETX [0 ] 0
|
|
M Transient_Local_GETX [0 ] 0
|
|
M Transient_GETS [0 ] 0
|
|
M Transient_Local_GETS [0 ] 0
|
|
M Persistent_GETX [0 ] 0
|
|
M Persistent_GETS [0 ] 0
|
|
M Own_Lock_or_Unlock [0 ] 0
|
|
|
|
MM Load [96 ] 96
|
|
MM Ifetch [0 ] 0
|
|
MM Store [104 ] 104
|
|
MM Atomic [0 ] 0
|
|
MM L1_Replacement [96 ] 96
|
|
MM Transient_GETX [0 ] 0
|
|
MM Transient_Local_GETX [0 ] 0
|
|
MM Transient_GETS [0 ] 0
|
|
MM Transient_Local_GETS [0 ] 0
|
|
MM Persistent_GETX [0 ] 0
|
|
MM Persistent_GETS [0 ] 0
|
|
MM Own_Lock_or_Unlock [0 ] 0
|
|
|
|
M_W Load [36 ] 36
|
|
M_W Ifetch [996 ] 996
|
|
M_W Store [3 ] 3
|
|
M_W Atomic [0 ] 0
|
|
M_W L1_Replacement [1 ] 1
|
|
M_W Transient_GETX [0 ] 0
|
|
M_W Transient_Local_GETX [0 ] 0
|
|
M_W Transient_GETS [0 ] 0
|
|
M_W Transient_Local_GETS [0 ] 0
|
|
M_W Persistent_GETX [0 ] 0
|
|
M_W Persistent_GETS [0 ] 0
|
|
M_W Own_Lock_or_Unlock [0 ] 0
|
|
M_W Use_TimeoutStarverX [0 ] 0
|
|
M_W Use_TimeoutStarverS [0 ] 0
|
|
M_W Use_TimeoutNoStarvers [392 ] 392
|
|
M_W Use_TimeoutNoStarvers_NoMig [0 ] 0
|
|
|
|
MM_W Load [6 ] 6
|
|
MM_W Ifetch [0 ] 0
|
|
MM_W Store [92 ] 92
|
|
MM_W Atomic [0 ] 0
|
|
MM_W L1_Replacement [1 ] 1
|
|
MM_W Transient_GETX [0 ] 0
|
|
MM_W Transient_Local_GETX [0 ] 0
|
|
MM_W Transient_GETS [0 ] 0
|
|
MM_W Transient_Local_GETS [0 ] 0
|
|
MM_W Persistent_GETX [0 ] 0
|
|
MM_W Persistent_GETS [0 ] 0
|
|
MM_W Own_Lock_or_Unlock [0 ] 0
|
|
MM_W Use_TimeoutStarverX [0 ] 0
|
|
MM_W Use_TimeoutStarverS [0 ] 0
|
|
MM_W Use_TimeoutNoStarvers [69 ] 69
|
|
MM_W Use_TimeoutNoStarvers_NoMig [0 ] 0
|
|
|
|
IM Load [0 ] 0
|
|
IM Ifetch [0 ] 0
|
|
IM Store [0 ] 0
|
|
IM Atomic [0 ] 0
|
|
IM L1_Replacement [0 ] 0
|
|
IM Data_Shared [0 ] 0
|
|
IM Data_Owner [0 ] 0
|
|
IM Data_All_Tokens [58 ] 58
|
|
IM Ack [1 ] 1
|
|
IM Transient_GETX [0 ] 0
|
|
IM Transient_Local_GETX [0 ] 0
|
|
IM Transient_GETS [0 ] 0
|
|
IM Transient_Local_GETS [0 ] 0
|
|
IM Transient_GETS_Last_Token [0 ] 0
|
|
IM Transient_Local_GETS_Last_Token [0 ] 0
|
|
IM Persistent_GETX [0 ] 0
|
|
IM Persistent_GETS [0 ] 0
|
|
IM Persistent_GETS_Last_Token [0 ] 0
|
|
IM Own_Lock_or_Unlock [0 ] 0
|
|
IM Request_Timeout [0 ] 0
|
|
|
|
SM Load [0 ] 0
|
|
SM Ifetch [0 ] 0
|
|
SM Store [0 ] 0
|
|
SM Atomic [0 ] 0
|
|
SM L1_Replacement [0 ] 0
|
|
SM Data_Shared [0 ] 0
|
|
SM Data_Owner [0 ] 0
|
|
SM Data_All_Tokens [8 ] 8
|
|
SM Ack [0 ] 0
|
|
SM Transient_GETX [0 ] 0
|
|
SM Transient_Local_GETX [0 ] 0
|
|
SM Transient_GETS [0 ] 0
|
|
SM Transient_Local_GETS [0 ] 0
|
|
SM Transient_GETS_Last_Token [0 ] 0
|
|
SM Transient_Local_GETS_Last_Token [0 ] 0
|
|
SM Persistent_GETX [0 ] 0
|
|
SM Persistent_GETS [0 ] 0
|
|
SM Persistent_GETS_Last_Token [0 ] 0
|
|
SM Own_Lock_or_Unlock [0 ] 0
|
|
SM Request_Timeout [0 ] 0
|
|
|
|
OM Load [0 ] 0
|
|
OM Ifetch [0 ] 0
|
|
OM Store [0 ] 0
|
|
OM Atomic [0 ] 0
|
|
OM L1_Replacement [0 ] 0
|
|
OM Data_Shared [0 ] 0
|
|
OM Data_All_Tokens [0 ] 0
|
|
OM Ack [0 ] 0
|
|
OM Ack_All_Tokens [0 ] 0
|
|
OM Transient_GETX [0 ] 0
|
|
OM Transient_Local_GETX [0 ] 0
|
|
OM Transient_GETS [0 ] 0
|
|
OM Transient_Local_GETS [0 ] 0
|
|
OM Transient_GETS_Last_Token [0 ] 0
|
|
OM Transient_Local_GETS_Last_Token [0 ] 0
|
|
OM Persistent_GETX [0 ] 0
|
|
OM Persistent_GETS [0 ] 0
|
|
OM Persistent_GETS_Last_Token [0 ] 0
|
|
OM Own_Lock_or_Unlock [0 ] 0
|
|
OM Request_Timeout [0 ] 0
|
|
|
|
IS Load [0 ] 0
|
|
IS Ifetch [0 ] 0
|
|
IS Store [0 ] 0
|
|
IS Atomic [0 ] 0
|
|
IS L1_Replacement [0 ] 0
|
|
IS Data_Shared [56 ] 56
|
|
IS Data_Owner [0 ] 0
|
|
IS Data_All_Tokens [396 ] 396
|
|
IS Ack [0 ] 0
|
|
IS Transient_GETX [0 ] 0
|
|
IS Transient_Local_GETX [0 ] 0
|
|
IS Transient_GETS [0 ] 0
|
|
IS Transient_Local_GETS [0 ] 0
|
|
IS Transient_GETS_Last_Token [0 ] 0
|
|
IS Transient_Local_GETS_Last_Token [0 ] 0
|
|
IS Persistent_GETX [0 ] 0
|
|
IS Persistent_GETS [0 ] 0
|
|
IS Persistent_GETS_Last_Token [0 ] 0
|
|
IS Own_Lock_or_Unlock [0 ] 0
|
|
IS Request_Timeout [0 ] 0
|
|
|
|
I_L Load [0 ] 0
|
|
I_L Ifetch [0 ] 0
|
|
I_L Store [0 ] 0
|
|
I_L Atomic [0 ] 0
|
|
I_L L1_Replacement [0 ] 0
|
|
I_L Data_Shared [0 ] 0
|
|
I_L Data_Owner [0 ] 0
|
|
I_L Data_All_Tokens [0 ] 0
|
|
I_L Ack [0 ] 0
|
|
I_L Transient_GETX [0 ] 0
|
|
I_L Transient_Local_GETX [0 ] 0
|
|
I_L Transient_GETS [0 ] 0
|
|
I_L Transient_Local_GETS [0 ] 0
|
|
I_L Transient_GETS_Last_Token [0 ] 0
|
|
I_L Transient_Local_GETS_Last_Token [0 ] 0
|
|
I_L Persistent_GETX [0 ] 0
|
|
I_L Persistent_GETS [0 ] 0
|
|
I_L Persistent_GETS_Last_Token [0 ] 0
|
|
I_L Own_Lock_or_Unlock [0 ] 0
|
|
|
|
S_L Load [0 ] 0
|
|
S_L Ifetch [0 ] 0
|
|
S_L Store [0 ] 0
|
|
S_L Atomic [0 ] 0
|
|
S_L L1_Replacement [0 ] 0
|
|
S_L Data_Shared [0 ] 0
|
|
S_L Data_Owner [0 ] 0
|
|
S_L Data_All_Tokens [0 ] 0
|
|
S_L Ack [0 ] 0
|
|
S_L Transient_GETX [0 ] 0
|
|
S_L Transient_Local_GETX [0 ] 0
|
|
S_L Transient_GETS [0 ] 0
|
|
S_L Transient_Local_GETS [0 ] 0
|
|
S_L Transient_GETS_Last_Token [0 ] 0
|
|
S_L Transient_Local_GETS_Last_Token [0 ] 0
|
|
S_L Persistent_GETX [0 ] 0
|
|
S_L Persistent_GETS [0 ] 0
|
|
S_L Persistent_GETS_Last_Token [0 ] 0
|
|
S_L Own_Lock_or_Unlock [0 ] 0
|
|
|
|
IM_L Load [0 ] 0
|
|
IM_L Ifetch [0 ] 0
|
|
IM_L Store [0 ] 0
|
|
IM_L Atomic [0 ] 0
|
|
IM_L L1_Replacement [0 ] 0
|
|
IM_L Data_Shared [0 ] 0
|
|
IM_L Data_Owner [0 ] 0
|
|
IM_L Data_All_Tokens [0 ] 0
|
|
IM_L Ack [0 ] 0
|
|
IM_L Transient_GETX [0 ] 0
|
|
IM_L Transient_Local_GETX [0 ] 0
|
|
IM_L Transient_GETS [0 ] 0
|
|
IM_L Transient_Local_GETS [0 ] 0
|
|
IM_L Transient_GETS_Last_Token [0 ] 0
|
|
IM_L Transient_Local_GETS_Last_Token [0 ] 0
|
|
IM_L Persistent_GETX [0 ] 0
|
|
IM_L Persistent_GETS [0 ] 0
|
|
IM_L Own_Lock_or_Unlock [0 ] 0
|
|
IM_L Request_Timeout [0 ] 0
|
|
|
|
SM_L Load [0 ] 0
|
|
SM_L Ifetch [0 ] 0
|
|
SM_L Store [0 ] 0
|
|
SM_L Atomic [0 ] 0
|
|
SM_L L1_Replacement [0 ] 0
|
|
SM_L Data_Shared [0 ] 0
|
|
SM_L Data_Owner [0 ] 0
|
|
SM_L Data_All_Tokens [0 ] 0
|
|
SM_L Ack [0 ] 0
|
|
SM_L Transient_GETX [0 ] 0
|
|
SM_L Transient_Local_GETX [0 ] 0
|
|
SM_L Transient_GETS [0 ] 0
|
|
SM_L Transient_Local_GETS [0 ] 0
|
|
SM_L Transient_GETS_Last_Token [0 ] 0
|
|
SM_L Transient_Local_GETS_Last_Token [0 ] 0
|
|
SM_L Persistent_GETX [0 ] 0
|
|
SM_L Persistent_GETS [0 ] 0
|
|
SM_L Persistent_GETS_Last_Token [0 ] 0
|
|
SM_L Own_Lock_or_Unlock [0 ] 0
|
|
SM_L Request_Timeout [0 ] 0
|
|
|
|
IS_L Load [0 ] 0
|
|
IS_L Ifetch [0 ] 0
|
|
IS_L Store [0 ] 0
|
|
IS_L Atomic [0 ] 0
|
|
IS_L L1_Replacement [0 ] 0
|
|
IS_L Data_Shared [0 ] 0
|
|
IS_L Data_Owner [0 ] 0
|
|
IS_L Data_All_Tokens [0 ] 0
|
|
IS_L Ack [0 ] 0
|
|
IS_L Transient_GETX [0 ] 0
|
|
IS_L Transient_Local_GETX [0 ] 0
|
|
IS_L Transient_GETS [0 ] 0
|
|
IS_L Transient_Local_GETS [0 ] 0
|
|
IS_L Transient_GETS_Last_Token [0 ] 0
|
|
IS_L Transient_Local_GETS_Last_Token [0 ] 0
|
|
IS_L Persistent_GETX [0 ] 0
|
|
IS_L Persistent_GETS [0 ] 0
|
|
IS_L Own_Lock_or_Unlock [0 ] 0
|
|
IS_L Request_Timeout [0 ] 0
|
|
|
|
Cache Stats: system.l2_cntrl0.L2cacheMemory
|
|
system.l2_cntrl0.L2cacheMemory_total_misses: 454
|
|
system.l2_cntrl0.L2cacheMemory_total_demand_misses: 454
|
|
system.l2_cntrl0.L2cacheMemory_total_prefetches: 0
|
|
system.l2_cntrl0.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l2_cntrl0.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l2_cntrl0.L2cacheMemory_request_type_GETS: 87.2247%
|
|
system.l2_cntrl0.L2cacheMemory_request_type_GETX: 12.7753%
|
|
|
|
system.l2_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 454 100%
|
|
|
|
--- L2Cache ---
|
|
- Event Counts -
|
|
L1_GETS [448 ] 448
|
|
L1_GETS_Last_Token [4 ] 4
|
|
L1_GETX [66 ] 66
|
|
L1_INV [0 ] 0
|
|
Transient_GETX [0 ] 0
|
|
Transient_GETS [0 ] 0
|
|
Transient_GETS_Last_Token [0 ] 0
|
|
L2_Replacement [458 ] 458
|
|
Writeback_Tokens [0 ] 0
|
|
Writeback_Shared_Data [21 ] 21
|
|
Writeback_All_Tokens [481 ] 481
|
|
Writeback_Owned [0 ] 0
|
|
Data_Shared [0 ] 0
|
|
Data_Owner [0 ] 0
|
|
Data_All_Tokens [0 ] 0
|
|
Ack [0 ] 0
|
|
Ack_All_Tokens [0 ] 0
|
|
Persistent_GETX [0 ] 0
|
|
Persistent_GETS [0 ] 0
|
|
Persistent_GETS_Last_Token [0 ] 0
|
|
Own_Lock_or_Unlock [0 ] 0
|
|
|
|
- Transitions -
|
|
NP L1_GETS [396 ] 396
|
|
NP L1_GETX [50 ] 50
|
|
NP L1_INV [0 ] 0
|
|
NP Transient_GETX [0 ] 0
|
|
NP Transient_GETS [0 ] 0
|
|
NP Writeback_Tokens [0 ] 0
|
|
NP Writeback_Shared_Data [18 ] 18
|
|
NP Writeback_All_Tokens [448 ] 448
|
|
NP Writeback_Owned [0 ] 0
|
|
NP Data_Shared [0 ] 0
|
|
NP Data_Owner [0 ] 0
|
|
NP Data_All_Tokens [0 ] 0
|
|
NP Ack [0 ] 0
|
|
NP Persistent_GETX [0 ] 0
|
|
NP Persistent_GETS [0 ] 0
|
|
NP Persistent_GETS_Last_Token [0 ] 0
|
|
NP Own_Lock_or_Unlock [0 ] 0
|
|
|
|
I L1_GETS [0 ] 0
|
|
I L1_GETS_Last_Token [0 ] 0
|
|
I L1_GETX [1 ] 1
|
|
I L1_INV [0 ] 0
|
|
I Transient_GETX [0 ] 0
|
|
I Transient_GETS [0 ] 0
|
|
I Transient_GETS_Last_Token [0 ] 0
|
|
I L2_Replacement [9 ] 9
|
|
I Writeback_Tokens [0 ] 0
|
|
I Writeback_Shared_Data [3 ] 3
|
|
I Writeback_All_Tokens [6 ] 6
|
|
I Writeback_Owned [0 ] 0
|
|
I Data_Shared [0 ] 0
|
|
I Data_Owner [0 ] 0
|
|
I Data_All_Tokens [0 ] 0
|
|
I Ack [0 ] 0
|
|
I Persistent_GETX [0 ] 0
|
|
I Persistent_GETS [0 ] 0
|
|
I Persistent_GETS_Last_Token [0 ] 0
|
|
I Own_Lock_or_Unlock [0 ] 0
|
|
|
|
S L1_GETS [0 ] 0
|
|
S L1_GETS_Last_Token [4 ] 4
|
|
S L1_GETX [1 ] 1
|
|
S L1_INV [0 ] 0
|
|
S Transient_GETX [0 ] 0
|
|
S Transient_GETS [0 ] 0
|
|
S Transient_GETS_Last_Token [0 ] 0
|
|
S L2_Replacement [15 ] 15
|
|
S Writeback_Tokens [0 ] 0
|
|
S Writeback_Shared_Data [0 ] 0
|
|
S Writeback_All_Tokens [0 ] 0
|
|
S Writeback_Owned [0 ] 0
|
|
S Data_Shared [0 ] 0
|
|
S Data_Owner [0 ] 0
|
|
S Data_All_Tokens [0 ] 0
|
|
S Ack [0 ] 0
|
|
S Persistent_GETX [0 ] 0
|
|
S Persistent_GETS [0 ] 0
|
|
S Persistent_GETS_Last_Token [0 ] 0
|
|
S Own_Lock_or_Unlock [0 ] 0
|
|
|
|
O L1_GETS [0 ] 0
|
|
O L1_GETS_Last_Token [0 ] 0
|
|
O L1_GETX [6 ] 6
|
|
O L1_INV [0 ] 0
|
|
O Transient_GETX [0 ] 0
|
|
O Transient_GETS [0 ] 0
|
|
O Transient_GETS_Last_Token [0 ] 0
|
|
O L2_Replacement [19 ] 19
|
|
O Writeback_Tokens [0 ] 0
|
|
O Writeback_Shared_Data [0 ] 0
|
|
O Writeback_All_Tokens [27 ] 27
|
|
O Data_Shared [0 ] 0
|
|
O Data_All_Tokens [0 ] 0
|
|
O Ack [0 ] 0
|
|
O Ack_All_Tokens [0 ] 0
|
|
O Persistent_GETX [0 ] 0
|
|
O Persistent_GETS [0 ] 0
|
|
O Persistent_GETS_Last_Token [0 ] 0
|
|
O Own_Lock_or_Unlock [0 ] 0
|
|
|
|
M L1_GETS [52 ] 52
|
|
M L1_GETX [8 ] 8
|
|
M L1_INV [0 ] 0
|
|
M Transient_GETX [0 ] 0
|
|
M Transient_GETS [0 ] 0
|
|
M L2_Replacement [415 ] 415
|
|
M Persistent_GETX [0 ] 0
|
|
M Persistent_GETS [0 ] 0
|
|
M Own_Lock_or_Unlock [0 ] 0
|
|
|
|
I_L L1_GETS [0 ] 0
|
|
I_L L1_GETX [0 ] 0
|
|
I_L L1_INV [0 ] 0
|
|
I_L Transient_GETX [0 ] 0
|
|
I_L Transient_GETS [0 ] 0
|
|
I_L Transient_GETS_Last_Token [0 ] 0
|
|
I_L L2_Replacement [0 ] 0
|
|
I_L Writeback_Tokens [0 ] 0
|
|
I_L Writeback_Shared_Data [0 ] 0
|
|
I_L Writeback_All_Tokens [0 ] 0
|
|
I_L Writeback_Owned [0 ] 0
|
|
I_L Data_Shared [0 ] 0
|
|
I_L Data_Owner [0 ] 0
|
|
I_L Data_All_Tokens [0 ] 0
|
|
I_L Ack [0 ] 0
|
|
I_L Persistent_GETX [0 ] 0
|
|
I_L Persistent_GETS [0 ] 0
|
|
I_L Own_Lock_or_Unlock [0 ] 0
|
|
|
|
S_L L1_GETS [0 ] 0
|
|
S_L L1_GETS_Last_Token [0 ] 0
|
|
S_L L1_GETX [0 ] 0
|
|
S_L L1_INV [0 ] 0
|
|
S_L Transient_GETX [0 ] 0
|
|
S_L Transient_GETS [0 ] 0
|
|
S_L Transient_GETS_Last_Token [0 ] 0
|
|
S_L L2_Replacement [0 ] 0
|
|
S_L Writeback_Tokens [0 ] 0
|
|
S_L Writeback_Shared_Data [0 ] 0
|
|
S_L Writeback_All_Tokens [0 ] 0
|
|
S_L Writeback_Owned [0 ] 0
|
|
S_L Data_Shared [0 ] 0
|
|
S_L Data_Owner [0 ] 0
|
|
S_L Data_All_Tokens [0 ] 0
|
|
S_L Ack [0 ] 0
|
|
S_L Persistent_GETX [0 ] 0
|
|
S_L Persistent_GETS [0 ] 0
|
|
S_L Persistent_GETS_Last_Token [0 ] 0
|
|
S_L Own_Lock_or_Unlock [0 ] 0
|
|
|
|
Memory controller: system.dir_cntrl0.memBuffer:
|
|
memory_total_requests: 532
|
|
memory_reads: 448
|
|
memory_writes: 84
|
|
memory_refreshes: 184
|
|
memory_total_request_delays: 169
|
|
memory_delays_per_request: 0.317669
|
|
memory_delays_in_input_queue: 45
|
|
memory_delays_behind_head_of_bank_queue: 0
|
|
memory_delays_stalled_at_head_of_bank_queue: 124
|
|
memory_stalls_for_bank_busy: 31
|
|
memory_stalls_for_random_busy: 0
|
|
memory_stalls_for_anti_starvation: 0
|
|
memory_stalls_for_arbitration: 10
|
|
memory_stalls_for_bus: 81
|
|
memory_stalls_for_tfaw: 0
|
|
memory_stalls_for_read_write_turnaround: 2
|
|
memory_stalls_for_read_read_turnaround: 0
|
|
accesses_per_bank: 19 10 0 39 20 19 31 22 5 3 6 4 22 41 22 3 4 6 7 13 10 18 14 42 16 5 5 12 13 18 14 69
|
|
|
|
--- Directory ---
|
|
- Event Counts -
|
|
GETX [107 ] 107
|
|
GETS [441 ] 441
|
|
Lockdown [0 ] 0
|
|
Unlockdown [0 ] 0
|
|
Own_Lock_or_Unlock [0 ] 0
|
|
Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
Data_Owner [3 ] 3
|
|
Data_All_Tokens [81 ] 81
|
|
Ack_Owner [16 ] 16
|
|
Ack_Owner_All_Tokens [334 ] 334
|
|
Tokens [0 ] 0
|
|
Ack_All_Tokens [15 ] 15
|
|
Request_Timeout [0 ] 0
|
|
Memory_Data [448 ] 448
|
|
Memory_Ack [84 ] 84
|
|
DMA_READ [0 ] 0
|
|
DMA_WRITE [0 ] 0
|
|
DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
- Transitions -
|
|
O GETX [52 ] 52
|
|
O GETS [396 ] 396
|
|
O Lockdown [0 ] 0
|
|
O Unlockdown [0 ] 0
|
|
O Own_Lock_or_Unlock [0 ] 0
|
|
O Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
O Data_Owner [0 ] 0
|
|
O Data_All_Tokens [0 ] 0
|
|
O Tokens [0 ] 0
|
|
O Ack_All_Tokens [15 ] 15
|
|
O DMA_READ [0 ] 0
|
|
O DMA_WRITE [0 ] 0
|
|
O DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
NO GETX [6 ] 6
|
|
NO GETS [0 ] 0
|
|
NO Lockdown [0 ] 0
|
|
NO Unlockdown [0 ] 0
|
|
NO Own_Lock_or_Unlock [0 ] 0
|
|
NO Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
NO Data_Owner [3 ] 3
|
|
NO Data_All_Tokens [81 ] 81
|
|
NO Ack_Owner [16 ] 16
|
|
NO Ack_Owner_All_Tokens [334 ] 334
|
|
NO Tokens [0 ] 0
|
|
NO DMA_READ [0 ] 0
|
|
NO DMA_WRITE [0 ] 0
|
|
|
|
L GETX [0 ] 0
|
|
L GETS [0 ] 0
|
|
L Lockdown [0 ] 0
|
|
L Unlockdown [0 ] 0
|
|
L Own_Lock_or_Unlock [0 ] 0
|
|
L Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
L Data_Owner [0 ] 0
|
|
L Data_All_Tokens [0 ] 0
|
|
L Ack_Owner [0 ] 0
|
|
L Ack_Owner_All_Tokens [0 ] 0
|
|
L Tokens [0 ] 0
|
|
L DMA_READ [0 ] 0
|
|
L DMA_WRITE [0 ] 0
|
|
L DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
O_W GETX [49 ] 49
|
|
O_W GETS [45 ] 45
|
|
O_W Lockdown [0 ] 0
|
|
O_W Unlockdown [0 ] 0
|
|
O_W Own_Lock_or_Unlock [0 ] 0
|
|
O_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
O_W Data_Owner [0 ] 0
|
|
O_W Data_All_Tokens [0 ] 0
|
|
O_W Ack_Owner [0 ] 0
|
|
O_W Tokens [0 ] 0
|
|
O_W Ack_All_Tokens [0 ] 0
|
|
O_W Memory_Data [0 ] 0
|
|
O_W Memory_Ack [84 ] 84
|
|
O_W DMA_READ [0 ] 0
|
|
O_W DMA_WRITE [0 ] 0
|
|
O_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
L_O_W GETX [0 ] 0
|
|
L_O_W GETS [0 ] 0
|
|
L_O_W Lockdown [0 ] 0
|
|
L_O_W Unlockdown [0 ] 0
|
|
L_O_W Own_Lock_or_Unlock [0 ] 0
|
|
L_O_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
L_O_W Data_Owner [0 ] 0
|
|
L_O_W Data_All_Tokens [0 ] 0
|
|
L_O_W Ack_Owner [0 ] 0
|
|
L_O_W Tokens [0 ] 0
|
|
L_O_W Ack_All_Tokens [0 ] 0
|
|
L_O_W Memory_Data [0 ] 0
|
|
L_O_W Memory_Ack [0 ] 0
|
|
L_O_W DMA_READ [0 ] 0
|
|
L_O_W DMA_WRITE [0 ] 0
|
|
L_O_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
L_NO_W GETX [0 ] 0
|
|
L_NO_W GETS [0 ] 0
|
|
L_NO_W Lockdown [0 ] 0
|
|
L_NO_W Unlockdown [0 ] 0
|
|
L_NO_W Own_Lock_or_Unlock [0 ] 0
|
|
L_NO_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
L_NO_W Data_Owner [0 ] 0
|
|
L_NO_W Data_All_Tokens [0 ] 0
|
|
L_NO_W Ack_Owner [0 ] 0
|
|
L_NO_W Tokens [0 ] 0
|
|
L_NO_W Ack_All_Tokens [0 ] 0
|
|
L_NO_W Memory_Data [0 ] 0
|
|
L_NO_W DMA_READ [0 ] 0
|
|
L_NO_W DMA_WRITE [0 ] 0
|
|
L_NO_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
DR_L_W GETX [0 ] 0
|
|
DR_L_W GETS [0 ] 0
|
|
DR_L_W Lockdown [0 ] 0
|
|
DR_L_W Unlockdown [0 ] 0
|
|
DR_L_W Own_Lock_or_Unlock [0 ] 0
|
|
DR_L_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
DR_L_W Data_Owner [0 ] 0
|
|
DR_L_W Data_All_Tokens [0 ] 0
|
|
DR_L_W Ack_Owner [0 ] 0
|
|
DR_L_W Tokens [0 ] 0
|
|
DR_L_W Ack_All_Tokens [0 ] 0
|
|
DR_L_W Request_Timeout [0 ] 0
|
|
DR_L_W Memory_Data [0 ] 0
|
|
DR_L_W DMA_READ [0 ] 0
|
|
DR_L_W DMA_WRITE [0 ] 0
|
|
DR_L_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
DW_L_W GETX [0 ] 0
|
|
DW_L_W GETS [0 ] 0
|
|
DW_L_W Lockdown [0 ] 0
|
|
DW_L_W Unlockdown [0 ] 0
|
|
DW_L_W Own_Lock_or_Unlock [0 ] 0
|
|
DW_L_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
DW_L_W Data_Owner [0 ] 0
|
|
DW_L_W Data_All_Tokens [0 ] 0
|
|
DW_L_W Ack_Owner [0 ] 0
|
|
DW_L_W Tokens [0 ] 0
|
|
DW_L_W Ack_All_Tokens [0 ] 0
|
|
DW_L_W Request_Timeout [0 ] 0
|
|
DW_L_W Memory_Ack [0 ] 0
|
|
DW_L_W DMA_READ [0 ] 0
|
|
DW_L_W DMA_WRITE [0 ] 0
|
|
DW_L_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
NO_W GETX [0 ] 0
|
|
NO_W GETS [0 ] 0
|
|
NO_W Lockdown [0 ] 0
|
|
NO_W Unlockdown [0 ] 0
|
|
NO_W Own_Lock_or_Unlock [0 ] 0
|
|
NO_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
NO_W Data_Owner [0 ] 0
|
|
NO_W Data_All_Tokens [0 ] 0
|
|
NO_W Ack_Owner [0 ] 0
|
|
NO_W Tokens [0 ] 0
|
|
NO_W Ack_All_Tokens [0 ] 0
|
|
NO_W Memory_Data [448 ] 448
|
|
NO_W DMA_READ [0 ] 0
|
|
NO_W DMA_WRITE [0 ] 0
|
|
NO_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
O_DW_W GETX [0 ] 0
|
|
O_DW_W GETS [0 ] 0
|
|
O_DW_W Lockdown [0 ] 0
|
|
O_DW_W Unlockdown [0 ] 0
|
|
O_DW_W Own_Lock_or_Unlock [0 ] 0
|
|
O_DW_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
O_DW_W Data_Owner [0 ] 0
|
|
O_DW_W Data_All_Tokens [0 ] 0
|
|
O_DW_W Ack_Owner [0 ] 0
|
|
O_DW_W Tokens [0 ] 0
|
|
O_DW_W Ack_All_Tokens [0 ] 0
|
|
O_DW_W Request_Timeout [0 ] 0
|
|
O_DW_W Memory_Ack [0 ] 0
|
|
O_DW_W DMA_READ [0 ] 0
|
|
O_DW_W DMA_WRITE [0 ] 0
|
|
O_DW_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
O_DR_W GETX [0 ] 0
|
|
O_DR_W GETS [0 ] 0
|
|
O_DR_W Lockdown [0 ] 0
|
|
O_DR_W Unlockdown [0 ] 0
|
|
O_DR_W Own_Lock_or_Unlock [0 ] 0
|
|
O_DR_W Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
O_DR_W Data_Owner [0 ] 0
|
|
O_DR_W Data_All_Tokens [0 ] 0
|
|
O_DR_W Ack_Owner [0 ] 0
|
|
O_DR_W Tokens [0 ] 0
|
|
O_DR_W Ack_All_Tokens [0 ] 0
|
|
O_DR_W Request_Timeout [0 ] 0
|
|
O_DR_W Memory_Data [0 ] 0
|
|
O_DR_W DMA_READ [0 ] 0
|
|
O_DR_W DMA_WRITE [0 ] 0
|
|
O_DR_W DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
O_DW GETX [0 ] 0
|
|
O_DW GETS [0 ] 0
|
|
O_DW Lockdown [0 ] 0
|
|
O_DW Unlockdown [0 ] 0
|
|
O_DW Own_Lock_or_Unlock [0 ] 0
|
|
O_DW Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
O_DW Data_Owner [0 ] 0
|
|
O_DW Data_All_Tokens [0 ] 0
|
|
O_DW Ack_Owner [0 ] 0
|
|
O_DW Ack_Owner_All_Tokens [0 ] 0
|
|
O_DW Tokens [0 ] 0
|
|
O_DW Ack_All_Tokens [0 ] 0
|
|
O_DW Request_Timeout [0 ] 0
|
|
O_DW DMA_READ [0 ] 0
|
|
O_DW DMA_WRITE [0 ] 0
|
|
O_DW DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
NO_DW GETX [0 ] 0
|
|
NO_DW GETS [0 ] 0
|
|
NO_DW Lockdown [0 ] 0
|
|
NO_DW Unlockdown [0 ] 0
|
|
NO_DW Own_Lock_or_Unlock [0 ] 0
|
|
NO_DW Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
NO_DW Data_Owner [0 ] 0
|
|
NO_DW Data_All_Tokens [0 ] 0
|
|
NO_DW Tokens [0 ] 0
|
|
NO_DW Request_Timeout [0 ] 0
|
|
NO_DW DMA_READ [0 ] 0
|
|
NO_DW DMA_WRITE [0 ] 0
|
|
NO_DW DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
NO_DR GETX [0 ] 0
|
|
NO_DR GETS [0 ] 0
|
|
NO_DR Lockdown [0 ] 0
|
|
NO_DR Unlockdown [0 ] 0
|
|
NO_DR Own_Lock_or_Unlock [0 ] 0
|
|
NO_DR Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
NO_DR Data_Owner [0 ] 0
|
|
NO_DR Data_All_Tokens [0 ] 0
|
|
NO_DR Tokens [0 ] 0
|
|
NO_DR Request_Timeout [0 ] 0
|
|
NO_DR DMA_READ [0 ] 0
|
|
NO_DR DMA_WRITE [0 ] 0
|
|
NO_DR DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
DW_L GETX [0 ] 0
|
|
DW_L GETS [0 ] 0
|
|
DW_L Lockdown [0 ] 0
|
|
DW_L Unlockdown [0 ] 0
|
|
DW_L Own_Lock_or_Unlock [0 ] 0
|
|
DW_L Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
DW_L Data_Owner [0 ] 0
|
|
DW_L Data_All_Tokens [0 ] 0
|
|
DW_L Ack_Owner [0 ] 0
|
|
DW_L Ack_Owner_All_Tokens [0 ] 0
|
|
DW_L Tokens [0 ] 0
|
|
DW_L Request_Timeout [0 ] 0
|
|
DW_L DMA_READ [0 ] 0
|
|
DW_L DMA_WRITE [0 ] 0
|
|
DW_L DMA_WRITE_All_Tokens [0 ] 0
|
|
|
|
DR_L GETX [0 ] 0
|
|
DR_L GETS [0 ] 0
|
|
DR_L Lockdown [0 ] 0
|
|
DR_L Unlockdown [0 ] 0
|
|
DR_L Own_Lock_or_Unlock [0 ] 0
|
|
DR_L Own_Lock_or_Unlock_Tokens [0 ] 0
|
|
DR_L Data_Owner [0 ] 0
|
|
DR_L Data_All_Tokens [0 ] 0
|
|
DR_L Ack_Owner [0 ] 0
|
|
DR_L Ack_Owner_All_Tokens [0 ] 0
|
|
DR_L Tokens [0 ] 0
|
|
DR_L Request_Timeout [0 ] 0
|
|
DR_L DMA_READ [0 ] 0
|
|
DR_L DMA_WRITE [0 ] 0
|
|
DR_L DMA_WRITE_All_Tokens [0 ] 0
|
|
|