e17c375ddd
This interface is no longer used, and getting rid of it simplifies the decoders and code that sets up the decoders. The thread context had been used to read architectural state which was used to contextualize the instruction memory as it came in. That was changed so that the state is now sent to the decoders to keep locally if/when it changes. That's significantly more efficient. Committed by: Nilay Vaish <nilay@cs.wisc.edu>
158 lines
4.2 KiB
C++
158 lines
4.2 KiB
C++
/*
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* Copyright (c) 2012 Google
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#ifndef __ARCH_ARM_DECODER_HH__
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#define __ARCH_ARM_DECODER_HH__
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#include <cassert>
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#include "arch/arm/miscregs.hh"
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#include "arch/arm/types.hh"
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#include "arch/generic/decode_cache.hh"
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#include "base/types.hh"
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#include "cpu/static_inst.hh"
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namespace ArmISA
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{
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class Decoder
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{
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protected:
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//The extended machine instruction being generated
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ExtMachInst emi;
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MachInst data;
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bool bigThumb;
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bool instDone;
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bool outOfBytes;
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int offset;
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bool foundIt;
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ITSTATE itBits;
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int fpscrLen;
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int fpscrStride;
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public:
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void reset()
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{
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bigThumb = false;
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offset = 0;
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emi = 0;
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instDone = false;
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outOfBytes = true;
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foundIt = false;
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}
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Decoder() : data(0), fpscrLen(0), fpscrStride(0)
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{
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reset();
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}
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void process();
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//Use this to give data to the decoder. This should be used
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//when there is control flow.
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void moreBytes(const PCState &pc, Addr fetchPC, MachInst inst);
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//Use this to give data to the decoder. This should be used
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//when instructions are executed in order.
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void moreBytes(MachInst machInst)
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{
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moreBytes(0, 0, machInst);
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}
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inline void consumeBytes(int numBytes)
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{
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offset += numBytes;
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assert(offset <= sizeof(MachInst));
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if (offset == sizeof(MachInst))
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outOfBytes = true;
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}
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bool needMoreBytes() const
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{
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return outOfBytes;
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}
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bool instReady() const
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{
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return instDone;
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}
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int getInstSize() const
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{
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return (!emi.thumb || emi.bigThumb) ? 4 : 2;
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}
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void setContext(FPSCR fpscr)
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{
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fpscrLen = fpscr.len;
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fpscrStride = fpscr.stride;
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}
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protected:
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/// A cache of decoded instruction objects.
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static GenericISA::BasicDecodeCache defaultCache;
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public:
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StaticInstPtr decodeInst(ExtMachInst mach_inst);
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/// Decode a machine instruction.
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/// @param mach_inst The binary instruction to decode.
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/// @retval A pointer to the corresponding StaticInst object.
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StaticInstPtr
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decode(ExtMachInst mach_inst, Addr addr)
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{
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return defaultCache.decode(this, mach_inst, addr);
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}
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StaticInstPtr
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decode(ArmISA::PCState &nextPC)
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{
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if (!instDone)
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return NULL;
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assert(instDone);
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ExtMachInst thisEmi = emi;
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nextPC.npc(nextPC.pc() + getInstSize());
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if (foundIt)
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nextPC.nextItstate(itBits);
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thisEmi.itstate = nextPC.itstate();
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nextPC.size(getInstSize());
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emi = 0;
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instDone = false;
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foundIt = false;
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return decode(thisEmi, nextPC.instAddr());
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}
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};
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} // namespace ArmISA
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#endif // __ARCH_ARM_DECODER_HH__
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