58c29640b7
instructions use it (instead of IntALU, as before). Default config
has a single non-pipelined 3-cycle unit. A bit conservative for the
ev6 (some are 1, some are 3).
arch/alpha/isa_desc:
Make hw_mfpr and hw_mtpr use IprAccessOp op class.
cpu/full_cpu/op_class.hh:
Add IprAccess.
--HG--
extra : convert_revision : d4103da3343a586936839e29981fd15d6930d442
64 lines
2.7 KiB
C++
64 lines
2.7 KiB
C++
/*
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* Copyright (c) 2003-2004 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __OP_CLASS_HH__
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#define __OP_CLASS_HH__
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/**
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* @file
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* Definition of operation classes.
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*/
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/**
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* Instruction operation classes. These classes are used for
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* assigning instructions to functional units.
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*/
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enum OpClass {
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No_OpClass = 0, /* inst does not use a functional unit */
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IntAluOp, /* integer ALU */
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IntMultOp, /* integer multiplier */
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IntDivOp, /* integer divider */
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FloatAddOp, /* floating point adder/subtractor */
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FloatCmpOp, /* floating point comparator */
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FloatCvtOp, /* floating point<->integer converter */
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FloatMultOp, /* floating point multiplier */
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FloatDivOp, /* floating point divider */
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FloatSqrtOp, /* floating point square root */
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MemReadOp, /* memory read port */
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MemWriteOp, /* memory write port */
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IprAccessOp, /* Internal Processor Register read/write port */
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InstPrefetchOp, /* instruction prefetch port (on I-cache) */
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Num_OpClasses /* total functional unit classes */
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};
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/**
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* Array mapping OpClass enum values to strings. Defined in fu_pool.cc.
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*/
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extern const char *opClassStrings[];
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#endif // __OP_CLASS_HH__
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