Andreas Hansson df8df4fd0a stats: Bump stats for decoder, TLB, prefetcher and DRAM changes ... Changes due to speculative execution of an unaligned PC, introduction of TLB stats, changes and re-work of the prefetcher, and the introduction of rank-wise refresh in the DRAM controller.		2014-12-23 09:31:20 -05:00
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pc-o3-timing	stats: Bump stats for decoder, TLB, prefetcher and DRAM changes	2014-12-23 09:31:20 -05:00
pc-simple-timing-ruby-MESI_Two_Level	stats: Bump stats for decoder, TLB, prefetcher and DRAM changes	2014-12-23 09:31:20 -05:00
pc-switcheroo-full	stats: Bump stats for decoder, TLB, prefetcher and DRAM changes	2014-12-23 09:31:20 -05:00