gem5/tests/long/se/30.eon/ref/arm/linux/simple-timing/simout
Steve Reinhardt d7c083864c stats: update stats for ld.so support
Additional auxv entries leads to more instructions in start-up
while walking the list, along with different cache conflicts
wrt stack entries.
2016-03-17 10:32:53 -07:00

19 lines
969 B
Text
Executable file

Redirecting stdout to build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing/simout
Redirecting stderr to build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing/simerr
gem5 Simulator System. http://gem5.org
gem5 is copyrighted software; use the --copyright option for details.
gem5 compiled Mar 16 2016 23:07:21
gem5 started Mar 16 2016 23:13:40
gem5 executing on dinar2c11, pid 25474
command line: build/ARM/gem5.opt -d build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing -re /home/stever/gem5-public/tests/run.py build/ARM/tests/opt/long/se/30.eon/arm/linux/simple-timing
Global frequency set at 1000000000000 ticks per second
info: Entering event queue @ 0. Starting simulation...
info: Increasing stack size by one page.
Eon, Version 1.1
info: Increasing stack size by one page.
info: Increasing stack size by one page.
info: Increasing stack size by one page.
OO-style eon Time= 0.510000
Exiting @ tick 517291025500 because target called exit()