1374 lines
68 KiB
Plaintext
1374 lines
68 KiB
Plaintext
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================ Begin RubySystem Configuration Print ================
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RubySystem config:
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random_seed: 1234
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randomization: 0
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cycle_period: 1
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block_size_bytes: 64
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block_size_bits: 6
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memory_size_bytes: 134217728
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memory_size_bits: 27
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Network Configuration
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---------------------
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network: SIMPLE_NETWORK
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topology:
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virtual_net_0: active, ordered
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virtual_net_1: active, ordered
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virtual_net_2: active, unordered
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virtual_net_3: active, unordered
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virtual_net_4: active, unordered
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virtual_net_5: active, unordered
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virtual_net_6: inactive
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virtual_net_7: inactive
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virtual_net_8: inactive
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virtual_net_9: inactive
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Profiler Configuration
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----------------------
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periodic_stats_period: 1000000
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================ End RubySystem Configuration Print ================
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Real time: Jan/10/2012 12:44:02
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Profiler Stats
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--------------
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Elapsed_time_in_seconds: 112
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Elapsed_time_in_minutes: 1.86667
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Elapsed_time_in_hours: 0.0311111
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Elapsed_time_in_days: 0.0012963
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Virtual_time_in_seconds: 111.5
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Virtual_time_in_minutes: 1.85833
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Virtual_time_in_hours: 0.0309722
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Virtual_time_in_days: 0.00129051
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Ruby_current_time: 19129228
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Ruby_start_time: 0
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Ruby_cycles: 19129228
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mbytes_resident: 37.8594
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mbytes_total: 362.402
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resident_ratio: 0.104489
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ruby_cycles_executed: [ 19129229 19129229 19129229 19129229 19129229 19129229 19129229 19129229 ]
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Busy Controller Counts:
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L1Cache-0:0 L1Cache-1:0 L1Cache-2:0 L1Cache-3:0 L1Cache-4:0 L1Cache-5:0 L1Cache-6:0 L1Cache-7:0
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Directory-0:0
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Busy Bank Count:0
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sequencer_requests_outstanding: [binsize: 1 max: 16 count: 614830 average: 15.9984 | standard deviation: 0.127016 | 0 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 614710 ]
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All Non-Zero Cycle Demand Cache Accesses
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----------------------------------------
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miss_latency: [binsize: 128 max: 18400 count: 614702 average: 3982.61 | standard deviation: 2992.13 | 1914 7044 12490 16512 15889 18736 21128 22310 19250 16973 18228 17272 14440 12720 11919 11264 9796 9053 8574 7249 7243 6931 6893 6397 5679 6057 6153 5744 5637 5473 5792 5538 5524 5879 5303 5590 5887 6113 6011 5470 6192 6473 6248 6357 6359 6725 6660 6739 7291 6595 6853 7000 7480 7136 6581 7014 7149 6614 6533 6018 6336 6070 5893 5695 4978 4966 4720 4574 4042 3444 3609 3407 3036 2737 2400 2393 2037 1944 1791 1453 1461 1289 1239 1059 857 864 803 682 596 520 465 370 374 339 249 229 191 202 184 132 137 127 101 94 70 60 65 39 36 36 32 20 22 32 9 8 11 11 9 6 12 5 5 3 5 5 2 2 3 2 1 1 1 1 1 0 1 0 1 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD: [binsize: 128 max: 18400 count: 399338 average: 3984.32 | standard deviation: 2993.07 | 1293 4556 8079 10724 10277 12230 13719 14584 12466 11028 11779 11190 9428 8274 7711 7272 6322 5923 5519 4696 4662 4567 4416 4173 3768 3938 3924 3726 3668 3559 3700 3595 3595 3843 3447 3665 3876 3934 3968 3574 4048 4230 3998 4144 4226 4388 4372 4351 4686 4318 4387 4504 4824 4620 4208 4525 4646 4303 4241 3942 4160 3962 3811 3657 3286 3189 3052 3011 2667 2246 2369 2174 1966 1804 1563 1542 1288 1284 1181 970 934 826 851 676 572 564 527 421 387 353 302 249 249 226 159 151 122 120 123 77 95 90 59 60 45 45 47 23 25 19 19 12 10 23 5 4 6 7 6 4 8 4 3 3 4 3 2 2 1 1 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST: [binsize: 128 max: 18030 count: 215364 average: 3979.43 | standard deviation: 2990.39 | 621 2488 4411 5788 5612 6506 7409 7726 6784 5945 6449 6082 5012 4446 4208 3992 3474 3130 3055 2553 2581 2364 2477 2224 1911 2119 2229 2018 1969 1914 2092 1943 1929 2036 1856 1925 2011 2179 2043 1896 2144 2243 2250 2213 2133 2337 2288 2388 2605 2277 2466 2496 2656 2516 2373 2489 2503 2311 2292 2076 2176 2108 2082 2038 1692 1777 1668 1563 1375 1198 1240 1233 1070 933 837 851 749 660 610 483 527 463 388 383 285 300 276 261 209 167 163 121 125 113 90 78 69 82 61 55 42 37 42 34 25 15 18 16 11 17 13 8 12 9 4 4 5 4 3 2 4 1 2 0 1 2 0 0 2 1 1 1 1 1 1 0 0 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache: [binsize: 1 max: 2 count: 133 average: 2 | standard deviation: 0 | 0 0 133 ]
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miss_latency_L2Cache: [binsize: 64 max: 6752 count: 563 average: 510.815 | standard deviation: 605.328 | 140 23 36 31 29 33 25 30 22 38 18 13 12 14 11 19 4 8 4 7 4 5 2 1 4 1 1 3 3 5 3 3 1 2 1 1 0 1 0 1 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_Directory: [binsize: 128 max: 18400 count: 594120 average: 4003.79 | standard deviation: 2989.88 | 0 6288 11765 15680 15030 18066 20545 21710 18726 16571 17865 16936 14178 12478 11639 11012 9579 8867 8371 7049 7048 6737 6685 6232 5493 5911 5956 5559 5443 5302 5572 5383 5365 5701 5105 5394 5665 5945 5794 5261 5978 6245 6035 6145 6135 6512 6439 6522 7046 6336 6613 6777 7274 6916 6374 6811 6947 6451 6334 5838 6133 5925 5724 5551 4850 4840 4613 4467 3950 3351 3519 3329 2973 2680 2343 2347 1990 1902 1763 1420 1427 1265 1215 1038 838 843 785 667 584 514 457 362 366 333 242 225 186 201 180 130 135 124 98 94 67 59 64 38 36 35 30 19 22 32 9 8 10 11 9 5 12 5 4 2 5 5 2 2 3 2 1 1 1 1 1 0 1 0 1 1 2 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_L1Cache_wCC: [binsize: 128 max: 15824 count: 19886 average: 3474.77 | standard deviation: 2989.85 | 1618 689 663 777 799 639 557 570 512 391 354 333 257 238 272 246 214 184 202 199 195 194 208 165 185 146 196 185 194 171 220 155 158 178 198 196 222 168 217 209 214 228 213 212 224 213 221 217 245 259 240 223 205 220 207 203 202 163 199 180 203 145 169 144 128 126 107 107 92 93 90 78 63 57 57 46 47 42 28 33 34 24 24 21 19 21 18 15 12 6 8 8 8 6 7 4 5 1 4 2 2 3 3 0 3 1 1 1 0 1 2 1 0 0 0 0 1 0 0 1 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_issue_to_initial_request: [binsize: 128 max: 15681 count: 19858 average: 3294.08 | standard deviation: 2973.13 | 2401 789 781 887 699 566 528 485 416 305 282 260 243 202 195 228 167 178 197 169 200 185 206 145 164 171 203 192 183 160 192 163 182 213 176 211 215 209 201 181 236 224 213 244 216 220 207 217 246 221 241 234 220 216 202 188 200 186 188 162 184 140 147 144 111 92 98 97 81 79 88 73 44 46 45 38 39 33 31 22 36 23 16 13 15 14 11 12 12 5 5 9 6 3 5 4 3 2 2 2 0 2 2 2 2 2 1 1 0 0 2 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_initial_forward_request: [binsize: 32 max: 3227 count: 19858 average: 155.74 | standard deviation: 323.185 | 14126 352 258 301 235 217 214 193 257 201 194 199 172 274 199 186 177 173 167 106 89 89 79 113 83 76 64 91 100 74 65 66 55 64 37 43 33 25 31 28 30 28 23 17 21 21 21 14 11 15 16 13 2 16 10 6 9 9 14 9 7 5 4 1 3 2 2 0 0 2 1 0 3 2 5 1 0 0 1 0 0 1 1 1 0 0 1 0 0 0 1 0 0 0 0 0 0 1 1 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_wCC_forward_to_first_response: [binsize: 1 max: 39 count: 19858 average: 24.6141 | standard deviation: 1.15269 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 14566 121 4592 47 162 198 137 14 11 6 0 2 1 0 0 1 ]
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miss_latency_wCC_first_response_to_completion: [binsize: 1 max: 15 count: 19858 average: 1.76186 | standard deviation: 1.57127 | 4563 5054 5189 3095 640 542 633 35 49 30 20 5 1 1 0 1 ]
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imcomplete_wCC_Times: 28
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miss_latency_dir_issue_to_initial_request: [binsize: 128 max: 18051 count: 594120 average: 3281.74 | standard deviation: 2955.22 | 70915 24061 22485 26839 20864 17583 15751 15347 11377 8651 8866 8376 7098 6392 6188 6335 5844 5688 5995 5148 5493 5406 5729 5236 4904 5474 5677 5276 5294 5230 5687 5306 5544 5949 5507 5825 5899 6456 6280 5788 6493 6783 6606 6801 6509 7149 6995 6970 7338 6522 6865 6751 6975 6391 5739 6040 6136 5568 5202 4825 4915 4299 4091 3958 3278 3193 2978 2814 2503 2209 2089 1919 1708 1485 1349 1302 1116 983 929 762 676 640 625 473 398 444 343 272 272 225 183 158 130 128 119 92 112 80 74 64 52 40 17 28 22 12 18 12 19 14 9 9 10 4 6 3 4 9 3 1 2 2 2 4 0 3 1 1 0 1 0 0 0 0 0 0 0 1 1 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_dir_initial_forward_request: [binsize: 16 max: 3183 count: 594120 average: 11.5723 | standard deviation: 55.3785 | 590603 289 44 73 70 75 38 102 87 47 78 59 67 83 44 68 38 61 59 29 47 29 45 48 25 45 29 41 35 27 55 30 62 61 46 66 36 65 72 30 61 32 65 51 30 43 18 39 41 14 23 22 26 39 12 19 11 22 24 16 32 13 22 30 11 19 10 26 25 12 24 10 17 19 7 15 9 17 14 5 11 8 12 10 5 13 2 4 9 3 7 3 4 7 7 9 0 6 9 5 3 3 5 7 4 7 3 3 4 2 3 0 1 3 3 3 2 2 6 7 2 1 1 3 0 0 3 2 2 3 2 0 0 1 0 1 2 1 4 0 1 2 2 2 1 2 2 2 1 0 0 1 0 1 1 4 1 1 0 0 1 0 1 2 0 0 0 0 0 0 2 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 1 ]
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miss_latency_dir_forward_to_first_response: [binsize: 1 max: 44 count: 594120 average: 24.8307 | standard deviation: 1.27614 | 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 381219 4947 183412 1522 7686 8318 5658 619 334 251 69 48 31 2 1 0 2 0 0 0 1 ]
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miss_latency_dir_first_response_to_completion: [binsize: 32 max: 4704 count: 594120 average: 685.644 | standard deviation: 462.597 | 0 0 0 14505 19454 17157 18632 21836 25332 21411 20516 20005 22296 24193 19296 17974 16634 16790 17488 13769 13634 13397 14499 15945 13165 13170 12959 14154 14461 10808 9503 8069 7842 7793 6041 5729 5422 5551 5820 4543 4542 4418 4789 4771 3559 3168 2848 2806 2691 2046 1922 1832 1861 1938 1548 1493 1390 1485 1485 1031 1022 860 944 857 675 579 560 607 596 451 494 416 404 478 307 324 254 259 253 203 193 173 174 163 112 124 127 108 111 94 80 75 54 61 54 42 41 40 45 38 24 28 24 18 16 12 10 20 7 7 4 5 8 7 6 7 4 8 8 4 3 1 2 2 4 2 2 0 1 1 0 1 2 1 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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imcomplete_dir_Times: 0
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miss_latency_LD_L1Cache: [binsize: 1 max: 2 count: 95 average: 2 | standard deviation: 0 | 0 0 95 ]
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miss_latency_LD_L2Cache: [binsize: 32 max: 3352 count: 371 average: 490.28 | standard deviation: 558.933 | 88 17 6 9 14 11 12 9 9 11 6 12 6 5 10 6 6 6 14 13 3 6 4 6 3 6 2 5 5 5 0 12 2 0 2 2 1 1 2 1 1 2 0 3 0 1 0 1 2 1 0 1 1 0 0 3 1 0 2 1 0 2 0 2 0 1 0 2 1 0 0 1 0 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD_Directory: [binsize: 128 max: 18400 count: 385874 average: 4005.47 | standard deviation: 2990.64 | 0 4056 7628 10185 9716 11799 13351 14190 12136 10766 11544 10977 9253 8118 7530 7094 6181 5799 5395 4567 4540 4430 4274 4067 3645 3840 3797 3603 3549 3439 3549 3492 3491 3721 3315 3545 3726 3827 3835 3445 3896 4083 3868 4004 4068 4243 4229 4205 4528 4161 4239 4357 4684 4481 4075 4394 4519 4193 4111 3819 4025 3866 3715 3561 3202 3100 2988 2933 2604 2182 2315 2128 1924 1763 1524 1510 1254 1256 1160 945 909 810 833 661 560 551 515 411 382 349 295 244 243 220 154 148 120 119 119 76 95 88 57 60 44 44 46 23 25 18 19 12 10 23 5 4 6 7 6 3 8 4 3 2 4 3 2 2 1 1 0 0 0 0 0 0 1 0 1 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_LD_L1Cache_wCC: [binsize: 128 max: 15824 count: 12998 average: 3485.28 | standard deviation: 2996.01 | 1078 454 413 512 522 412 352 372 324 257 229 211 171 152 177 174 138 122 123 128 122 137 142 106 122 98 126 123 119 120 151 103 104 122 132 120 150 107 133 129 152 147 130 140 158 145 143 146 158 157 148 147 140 139 133 131 127 110 130 123 135 96 96 96 84 89 64 78 63 64 54 46 42 41 39 32 34 28 21 25 25 16 18 15 12 13 12 10 5 4 7 5 6 6 5 3 2 1 4 1 0 2 2 0 1 1 1 0 0 1 0 0 0 0 0 0 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache: [binsize: 1 max: 2 count: 38 average: 2 | standard deviation: 0 | 0 0 38 ]
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miss_latency_ST_L2Cache: [binsize: 64 max: 6752 count: 192 average: 550.495 | standard deviation: 685.986 | 35 8 11 10 9 15 14 14 10 11 9 3 3 7 1 7 2 4 2 4 1 2 1 0 1 0 0 0 2 2 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_Directory: [binsize: 128 max: 18030 count: 208246 average: 4000.67 | standard deviation: 2988.48 | 0 2232 4137 5495 5314 6267 7194 7520 6590 5805 6321 5959 4925 4360 4109 3918 3398 3068 2976 2482 2508 2307 2411 2165 1848 2071 2159 1956 1894 1863 2023 1891 1874 1980 1790 1849 1939 2118 1959 1816 2082 2162 2167 2141 2067 2269 2210 2317 2518 2175 2374 2420 2590 2435 2299 2417 2428 2258 2223 2019 2108 2059 2009 1990 1648 1740 1625 1534 1346 1169 1204 1201 1049 917 819 837 736 646 603 475 518 455 382 377 278 292 270 256 202 165 162 118 123 113 88 77 66 82 61 54 40 36 41 34 23 15 18 15 11 17 11 7 12 9 4 4 4 4 3 2 4 1 1 0 1 2 0 0 2 1 1 1 1 1 1 0 0 0 0 1 2 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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miss_latency_ST_L1Cache_wCC: [binsize: 128 max: 15717 count: 6888 average: 3454.94 | standard deviation: 2978.32 | 540 235 250 265 277 227 205 198 188 134 125 122 86 86 95 72 76 62 79 71 73 57 66 59 63 48 70 62 75 51 69 52 54 56 66 76 72 61 84 80 62 81 83 72 66 68 78 71 87 102 92 76 65 81 74 72 75 53 69 57 68 49 73 48 44 37 43 29 29 29 36 32 21 16 18 14 13 14 7 8 9 8 6 6 7 8 6 5 7 2 1 3 2 0 2 1 3 0 0 1 2 1 1 0 2 0 0 1 0 0 2 1 0 0 0 0 1 0 0 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ]
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All Non-Zero Cycle SW Prefetch Requests
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------------------------------------
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prefetch_latency: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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prefetch_latency_L2Miss:[binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Request vs. RubySystem State Profile
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--------------------------------
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filter_action: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Message Delayed Cycles
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----------------------
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Total_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Total_nonPF_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_0_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_1_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_2_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_3_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_4_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_5_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_6_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_7_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_8_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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virtual_network_9_delay_cycles: [binsize: 1 max: 0 count: 0 average: NaN |standard deviation: NaN | 0 ]
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Resource Usage
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--------------
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page_size: 4096
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user_time: 111
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system_time: 0
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page_reclaims: 10681
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page_faults: 0
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swaps: 0
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block_inputs: 0
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block_outputs: 0
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Network Stats
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-------------
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total_msg_count_Request_Control: 1842177 14737416
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total_msg_count_Response_Data: 1842009 132624648
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total_msg_count_Response_Control: 12834456 102675648
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total_msg_count_Writeback_Data: 638355 45961560
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total_msg_count_Writeback_Control: 4574040 36592320
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total_msg_count_Broadcast_Control: 9210045 73680360
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total_msg_count_Unblock_Control: 1842045 14736360
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total_msgs: 32783127 total_bytes: 421008312
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switch_0_inlinks: 2
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switch_0_outlinks: 2
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links_utilized_percent_switch_0: 3.77789
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links_utilized_percent_switch_0_link_0: 4.7773 bw: 16000 base_latency: 1
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links_utilized_percent_switch_0_link_1: 2.77847 bw: 16000 base_latency: 1
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outgoing_messages_switch_0_link_0_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Data: 76290 5492880 [ 0 0 0 0 76290 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Response_Control: 531541 4252328 [ 0 0 0 0 531541 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Writeback_Control: 71850 574800 [ 0 0 0 71850 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_0_Broadcast_Control: 537716 4301728 [ 0 0 0 537716 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Request_Control: 76294 610352 [ 0 0 76294 0 0 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Response_Data: 2509 180648 [ 0 0 0 0 2509 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Response_Control: 535210 4281680 [ 0 0 0 0 535210 0 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Writeback_Data: 26116 1880352 [ 0 0 0 0 0 26116 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Writeback_Control: 117581 940648 [ 0 0 71850 0 0 45731 0 0 0 0 ] base_latency: 1
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outgoing_messages_switch_0_link_1_Unblock_Control: 76291 610328 [ 0 0 0 0 0 76291 0 0 0 0 ] base_latency: 1
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switch_1_inlinks: 2
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switch_1_outlinks: 2
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links_utilized_percent_switch_1: 3.7653
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links_utilized_percent_switch_1_link_0: 4.75571 bw: 16000 base_latency: 1
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links_utilized_percent_switch_1_link_1: 2.77489 bw: 16000 base_latency: 1
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outgoing_messages_switch_1_link_0_Request_Control: 2 16 [ 0 0 0 2 0 0 0 0 0 0 ] base_latency: 1
|
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outgoing_messages_switch_1_link_0_Response_Data: 75768 5455296 [ 0 0 0 0 75768 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_0_Response_Control: 527899 4223192 [ 0 0 0 0 527899 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_0_Writeback_Control: 71411 571288 [ 0 0 0 71411 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_0_Broadcast_Control: 538238 4305904 [ 0 0 0 538238 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Request_Control: 75771 606168 [ 0 0 75771 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Response_Data: 2543 183096 [ 0 0 0 0 2543 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Response_Control: 535695 4285560 [ 0 0 0 0 535695 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Writeback_Data: 26086 1878192 [ 0 0 0 0 0 26086 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Writeback_Control: 116734 933872 [ 0 0 71411 0 0 45323 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_1_link_1_Unblock_Control: 75770 606160 [ 0 0 0 0 0 75770 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_2_inlinks: 2
|
|
switch_2_outlinks: 2
|
|
links_utilized_percent_switch_2: 3.80482
|
|
links_utilized_percent_switch_2_link_0: 4.80949 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_2_link_1: 2.80015 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_2_link_0_Request_Control: 5 40 [ 0 0 0 5 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Response_Data: 77050 5547600 [ 0 0 0 0 77050 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Response_Control: 536881 4295048 [ 0 0 0 0 536881 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Writeback_Control: 72745 581960 [ 0 0 0 72745 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_0_Broadcast_Control: 536954 4295632 [ 0 0 0 536954 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Request_Control: 77053 616424 [ 0 0 77053 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Response_Data: 2530 182160 [ 0 0 0 0 2530 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Response_Control: 534427 4275416 [ 0 0 0 0 534427 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Writeback_Data: 26813 1930536 [ 0 0 0 0 0 26813 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Writeback_Control: 118676 949408 [ 0 0 72745 0 0 45931 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_2_link_1_Unblock_Control: 77051 616408 [ 0 0 0 0 0 77051 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_3_inlinks: 2
|
|
switch_3_outlinks: 2
|
|
links_utilized_percent_switch_3: 3.79764
|
|
links_utilized_percent_switch_3_link_0: 4.80131 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_3_link_1: 2.79397 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_3_link_0_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Response_Data: 76848 5533056 [ 0 0 0 0 76848 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Response_Control: 535559 4284472 [ 0 0 0 0 535559 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Writeback_Control: 72563 580504 [ 0 0 0 72563 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_0_Broadcast_Control: 537150 4297200 [ 0 0 0 537150 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Request_Control: 76853 614824 [ 0 0 76853 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Response_Data: 2432 175104 [ 0 0 0 0 2432 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Response_Control: 534719 4277752 [ 0 0 0 0 534719 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Writeback_Data: 26687 1921464 [ 0 0 0 0 0 26687 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Writeback_Control: 118434 947472 [ 0 0 72563 0 0 45871 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_3_link_1_Unblock_Control: 76854 614832 [ 0 0 0 0 0 76854 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_4_inlinks: 2
|
|
switch_4_outlinks: 2
|
|
links_utilized_percent_switch_4: 3.80564
|
|
links_utilized_percent_switch_4_link_0: 4.81386 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_4_link_1: 2.79743 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_4_link_0_Request_Control: 2 16 [ 0 0 0 2 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Response_Data: 77157 5555304 [ 0 0 0 0 77157 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Response_Control: 537662 4301296 [ 0 0 0 0 537662 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Writeback_Control: 72784 582272 [ 0 0 0 72784 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_0_Broadcast_Control: 536846 4294768 [ 0 0 0 536846 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Request_Control: 77161 617288 [ 0 0 77161 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Response_Data: 2451 176472 [ 0 0 0 0 2451 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Response_Control: 534395 4275160 [ 0 0 0 0 534395 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Writeback_Data: 26739 1925208 [ 0 0 0 0 0 26739 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Writeback_Control: 118829 950632 [ 0 0 72784 0 0 46045 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_4_link_1_Unblock_Control: 77157 617256 [ 0 0 0 0 0 77157 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_5_inlinks: 2
|
|
switch_5_outlinks: 2
|
|
links_utilized_percent_switch_5: 3.81066
|
|
links_utilized_percent_switch_5_link_0: 4.81794 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_5_link_1: 2.80338 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_5_link_0_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Response_Data: 77256 5562432 [ 0 0 0 0 77256 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Response_Control: 538294 4306352 [ 0 0 0 0 538294 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Writeback_Control: 72924 583392 [ 0 0 0 72924 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_0_Broadcast_Control: 536745 4293960 [ 0 0 0 536745 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Request_Control: 77259 618072 [ 0 0 77259 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Response_Data: 2540 182880 [ 0 0 0 0 2540 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Response_Control: 534211 4273688 [ 0 0 0 0 534211 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Writeback_Data: 26887 1935864 [ 0 0 0 0 0 26887 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Writeback_Control: 118960 951680 [ 0 0 72924 0 0 46036 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_5_link_1_Unblock_Control: 77257 618056 [ 0 0 0 0 0 77257 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_6_inlinks: 2
|
|
switch_6_outlinks: 2
|
|
links_utilized_percent_switch_6: 3.79483
|
|
links_utilized_percent_switch_6_link_0: 4.79668 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_6_link_1: 2.79299 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_6_link_0_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Response_Data: 76749 5525928 [ 0 0 0 0 76749 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Response_Control: 534680 4277440 [ 0 0 0 0 534680 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Writeback_Control: 72458 579664 [ 0 0 0 72458 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_0_Broadcast_Control: 537253 4298024 [ 0 0 0 537253 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Request_Control: 76752 614016 [ 0 0 76752 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Response_Data: 2416 173952 [ 0 0 0 0 2416 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Response_Control: 534839 4278712 [ 0 0 0 0 534839 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Writeback_Data: 26694 1921968 [ 0 0 0 0 0 26694 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Writeback_Control: 118222 945776 [ 0 0 72458 0 0 45764 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_6_link_1_Unblock_Control: 76750 614000 [ 0 0 0 0 0 76750 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_7_inlinks: 2
|
|
switch_7_outlinks: 2
|
|
links_utilized_percent_switch_7: 3.79875
|
|
links_utilized_percent_switch_7_link_0: 4.80193 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_7_link_1: 2.79556 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_7_link_0_Request_Control: 1 8 [ 0 0 0 1 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Response_Data: 76885 5535720 [ 0 0 0 0 76885 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Response_Control: 535636 4285088 [ 0 0 0 0 535636 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Writeback_Control: 72424 579392 [ 0 0 0 72424 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_0_Broadcast_Control: 537119 4296952 [ 0 0 0 537119 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Request_Control: 76888 615104 [ 0 0 76888 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Response_Data: 2462 177264 [ 0 0 0 0 2462 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Response_Control: 534656 4277248 [ 0 0 0 0 534656 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Writeback_Data: 26763 1926936 [ 0 0 0 0 0 26763 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Writeback_Control: 118085 944680 [ 0 0 72424 0 0 45661 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_7_link_1_Unblock_Control: 76885 615080 [ 0 0 0 0 0 76885 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_8_inlinks: 2
|
|
switch_8_outlinks: 2
|
|
links_utilized_percent_switch_8: 13.8909
|
|
links_utilized_percent_switch_8_link_0: 10.6869 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_8_link_1: 17.095 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_8_link_0_Request_Control: 614031 4912248 [ 0 0 614031 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_0_Writeback_Data: 212785 15320520 [ 0 0 0 0 0 212785 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_0_Writeback_Control: 945521 7564168 [ 0 0 579159 0 0 366362 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_0_Unblock_Control: 614015 4912120 [ 0 0 0 0 0 614015 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Request_Control: 28 224 [ 0 0 0 28 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Response_Data: 594120 42776640 [ 0 0 0 0 594120 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Writeback_Control: 579159 4633272 [ 0 0 0 579159 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_8_link_1_Broadcast_Control: 614003 4912024 [ 0 0 0 614003 0 0 0 0 0 0 ] base_latency: 1
|
|
|
|
switch_9_inlinks: 9
|
|
switch_9_outlinks: 9
|
|
links_utilized_percent_switch_9: 5.45123
|
|
links_utilized_percent_switch_9_link_0: 4.7773 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_1: 4.75571 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_2: 4.80949 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_3: 4.80131 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_4: 4.81386 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_5: 4.81795 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_6: 4.79668 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_7: 4.80193 bw: 16000 base_latency: 1
|
|
links_utilized_percent_switch_9_link_8: 10.6869 bw: 16000 base_latency: 1
|
|
|
|
outgoing_messages_switch_9_link_0_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Response_Data: 76290 5492880 [ 0 0 0 0 76290 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Response_Control: 531541 4252328 [ 0 0 0 0 531541 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Writeback_Control: 71850 574800 [ 0 0 0 71850 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_0_Broadcast_Control: 537716 4301728 [ 0 0 0 537716 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Request_Control: 2 16 [ 0 0 0 2 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Response_Data: 75768 5455296 [ 0 0 0 0 75768 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Response_Control: 527899 4223192 [ 0 0 0 0 527899 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Writeback_Control: 71411 571288 [ 0 0 0 71411 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_1_Broadcast_Control: 538238 4305904 [ 0 0 0 538238 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Request_Control: 5 40 [ 0 0 0 5 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Response_Data: 77050 5547600 [ 0 0 0 0 77050 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Response_Control: 536881 4295048 [ 0 0 0 0 536881 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Writeback_Control: 72745 581960 [ 0 0 0 72745 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_2_Broadcast_Control: 536954 4295632 [ 0 0 0 536954 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Request_Control: 3 24 [ 0 0 0 3 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Response_Data: 76848 5533056 [ 0 0 0 0 76848 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Response_Control: 535559 4284472 [ 0 0 0 0 535559 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Writeback_Control: 72563 580504 [ 0 0 0 72563 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_3_Broadcast_Control: 537150 4297200 [ 0 0 0 537150 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Request_Control: 2 16 [ 0 0 0 2 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Response_Data: 77157 5555304 [ 0 0 0 0 77157 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Response_Control: 537662 4301296 [ 0 0 0 0 537662 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Writeback_Control: 72784 582272 [ 0 0 0 72784 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_4_Broadcast_Control: 536846 4294768 [ 0 0 0 536846 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Request_Control: 8 64 [ 0 0 0 8 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Response_Data: 77256 5562432 [ 0 0 0 0 77256 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Response_Control: 538294 4306352 [ 0 0 0 0 538294 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Writeback_Control: 72924 583392 [ 0 0 0 72924 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_5_Broadcast_Control: 536745 4293960 [ 0 0 0 536745 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Request_Control: 4 32 [ 0 0 0 4 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Response_Data: 76749 5525928 [ 0 0 0 0 76749 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Response_Control: 534680 4277440 [ 0 0 0 0 534680 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Writeback_Control: 72458 579664 [ 0 0 0 72458 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_6_Broadcast_Control: 537253 4298024 [ 0 0 0 537253 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Request_Control: 1 8 [ 0 0 0 1 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Response_Data: 76885 5535720 [ 0 0 0 0 76885 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Response_Control: 535636 4285088 [ 0 0 0 0 535636 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Writeback_Control: 72424 579392 [ 0 0 0 72424 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_7_Broadcast_Control: 537119 4296952 [ 0 0 0 537119 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Request_Control: 614031 4912248 [ 0 0 614031 0 0 0 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Writeback_Data: 212785 15320520 [ 0 0 0 0 0 212785 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Writeback_Control: 945521 7564168 [ 0 0 579159 0 0 366362 0 0 0 0 ] base_latency: 1
|
|
outgoing_messages_switch_9_link_8_Unblock_Control: 614015 4912120 [ 0 0 0 0 0 614015 0 0 0 0 ] base_latency: 1
|
|
|
|
Cache Stats: system.l1_cntrl0.L1IcacheMemory
|
|
system.l1_cntrl0.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl0.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl0.L1DcacheMemory
|
|
system.l1_cntrl0.L1DcacheMemory_total_misses: 76356
|
|
system.l1_cntrl0.L1DcacheMemory_total_demand_misses: 76356
|
|
system.l1_cntrl0.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl0.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl0.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_LD: 65.3727%
|
|
system.l1_cntrl0.L1DcacheMemory_request_type_ST: 34.6273%
|
|
|
|
system.l1_cntrl0.L1DcacheMemory_access_mode_type_Supervisor: 76356 100%
|
|
|
|
Cache Stats: system.l1_cntrl0.L2cacheMemory
|
|
system.l1_cntrl0.L2cacheMemory_total_misses: 76356
|
|
system.l1_cntrl0.L2cacheMemory_total_demand_misses: 76356
|
|
system.l1_cntrl0.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl0.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl0.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl0.L2cacheMemory_request_type_LD: 65.3727%
|
|
system.l1_cntrl0.L2cacheMemory_request_type_ST: 34.6273%
|
|
|
|
system.l1_cntrl0.L2cacheMemory_access_mode_type_Supervisor: 76356 100%
|
|
|
|
--- L1Cache ---
|
|
- Event Counts -
|
|
Load [50226 50162 49933 49936 49950 49466 49962 49958 ] 399593
|
|
Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
Store [27060 27258 26937 27082 26459 26444 27221 27049 ] 215510
|
|
L2_Replacement [77144 77245 76740 76875 76282 75759 77037 76837 ] 613919
|
|
L1_to_L2 [841564 837430 840967 837780 832569 831317 842943 837009 ] 6701579
|
|
Trigger_L2_to_L1D [75 87 65 65 62 86 68 85 ] 593
|
|
Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
Complete_L2_to_L1 [75 87 65 65 62 86 68 85 ] 593
|
|
Other_GETX [188117 187930 188238 188102 188720 188737 187986 188143 ] 1505973
|
|
Other_GETS [348729 348815 349015 349017 348996 349501 348968 349007 ] 2792048
|
|
Merged_GETS [2 8 4 1 3 2 5 3 ] 28
|
|
Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
Ack [537613 538244 534612 535568 531478 527832 536832 535493 ] 4277672
|
|
Shared_Ack [49 50 68 68 63 67 49 66 ] 480
|
|
Data [2928 2931 2904 2930 2916 2838 2791 2896 ] 23134
|
|
Shared_Data [1033 1064 1027 1109 1056 1055 1027 1034 ] 8405
|
|
Exclusive_Data [73196 73261 72818 72846 72318 71875 73232 72918 ] 582464
|
|
Writeback_Ack [72784 72924 72458 72424 71850 71411 72745 72563 ] 579159
|
|
Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
All_acks [1074 1108 1087 1167 1109 1111 1066 1090 ] 8812
|
|
All_acks_no_sharers [76083 76148 75663 75718 75181 74657 75984 75759 ] 605193
|
|
Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
Block_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
- Transitions -
|
|
I Load [50137 50050 49851 49850 49875 49369 49898 49855 ] 398885
|
|
I Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
I Store [27017 27205 26899 27035 26418 26400 27149 26992 ] 215115
|
|
I L2_Replacement [1480 1454 1402 1469 1495 1454 1505 1429 ] 11688
|
|
I L1_to_L2 [324 304 306 328 333 308 317 322 ] 2542
|
|
I Trigger_L2_to_L1D [3 1 1 1 1 1 3 4 ] 15
|
|
I Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
I Other_GETX [187219 187022 187382 187188 187800 187877 187064 187266 ] 1498818
|
|
I Other_GETS [347074 347104 347370 347357 347306 347716 347261 347378 ] 2778566
|
|
I Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
I NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
I Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
I Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
S Load [0 2 0 0 0 1 0 1 ] 4
|
|
S Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
S Store [0 0 0 1 0 0 0 0 ] 1
|
|
S L2_Replacement [2880 2867 2880 2982 2937 2894 2787 2845 ] 23072
|
|
S L1_to_L2 [2918 2897 2902 3011 2962 2913 2816 2865 ] 23284
|
|
S Trigger_L2_to_L1D [6 7 1 2 1 2 5 4 ] 28
|
|
S Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
S Other_GETX [39 33 28 34 30 24 30 21 ] 239
|
|
S Other_GETS [57 52 56 63 61 71 65 55 ] 480
|
|
S Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
S NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
S Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
S Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
O Load [0 0 0 1 0 0 0 0 ] 1
|
|
O Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
O Store [0 0 0 0 0 0 0 0 ] 0
|
|
O L2_Replacement [985 1088 1013 1004 1016 1086 1017 993 ] 8202
|
|
O L1_to_L2 [217 230 240 228 212 238 237 220 ] 1822
|
|
O Trigger_L2_to_L1D [1 1 2 1 0 2 0 1 ] 8
|
|
O Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
O Other_GETX [9 7 8 5 5 7 6 4 ] 51
|
|
O Other_GETS [9 12 16 12 12 11 23 13 ] 108
|
|
O Merged_GETS [1 2 2 0 2 2 0 1 ] 10
|
|
O Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
O NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
O Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
O Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M Load [5 8 8 10 6 5 8 9 ] 59
|
|
M Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
M Store [1 2 5 2 2 1 5 4 ] 22
|
|
M L2_Replacement [45635 45519 45374 45234 45296 44789 45455 45429 ] 362731
|
|
M L1_to_L2 [46902 46843 46611 46507 46580 46124 46732 46661 ] 372960
|
|
M Trigger_L2_to_L1D [38 50 37 37 44 53 36 52 ] 347
|
|
M Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
M Other_GETX [567 512 529 570 567 540 578 537 ] 4400
|
|
M Other_GETS [993 1090 1020 1008 1020 1093 1018 996 ] 8238
|
|
M Merged_GETS [0 0 1 0 0 0 2 0 ] 3
|
|
M Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
M NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
M Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
M Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM Load [6 5 1 6 4 0 6 3 ] 31
|
|
MM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM Store [1 2 3 3 2 1 2 2 ] 16
|
|
MM L2_Replacement [26164 26317 26071 26186 25538 25536 26273 26141 ] 208226
|
|
MM L1_to_L2 [26864 27064 26752 26872 26263 26268 27008 26860 ] 213951
|
|
MM Trigger_L2_to_L1D [27 28 24 24 16 28 24 24 ] 195
|
|
MM Trigger_L2_to_L1I [0 0 0 0 0 0 0 0 ] 0
|
|
MM Other_GETX [279 354 287 298 312 281 304 309 ] 2424
|
|
MM Other_GETS [589 550 551 563 583 603 591 563 ] 4593
|
|
MM Merged_GETS [1 6 1 1 1 0 3 2 ] 15
|
|
MM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IR Load [2 0 0 1 0 0 2 2 ] 7
|
|
IR Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IR Store [1 1 1 0 1 1 1 2 ] 8
|
|
IR L1_to_L2 [0 0 0 0 0 0 0 5 ] 5
|
|
IR Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SR Load [2 5 1 1 1 1 2 3 ] 16
|
|
SR Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
SR Store [4 2 0 1 0 1 3 1 ] 12
|
|
SR L1_to_L2 [13 20 14 16 2 0 7 0 ] 72
|
|
SR Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OR Load [1 0 1 1 0 2 0 0 ] 5
|
|
OR Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OR Store [0 1 1 0 0 0 0 1 ] 3
|
|
OR L1_to_L2 [2 0 10 1 0 0 0 0 ] 13
|
|
OR Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MR Load [25 33 30 25 28 33 19 36 ] 229
|
|
MR Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MR Store [13 17 7 12 16 20 17 16 ] 118
|
|
MR L1_to_L2 [45 115 67 80 92 100 100 102 ] 701
|
|
MR Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MMR Load [18 19 13 12 12 23 10 14 ] 121
|
|
MMR Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MMR Store [9 9 11 12 4 5 14 10 ] 74
|
|
MMR L1_to_L2 [37 47 30 35 16 52 58 39 ] 314
|
|
MMR Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IM Load [0 0 0 0 0 0 0 0 ] 0
|
|
IM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IM Store [0 0 0 0 0 0 0 0 ] 0
|
|
IM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IM L1_to_L2 [267178 264984 265366 266693 262467 263874 265817 265929 ] 2122308
|
|
IM Other_GETX [0 1 0 3 2 4 1 1 ] 12
|
|
IM Other_GETS [1 0 0 4 0 1 1 0 ] 7
|
|
IM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
IM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
IM Ack [185758 186865 184602 185732 181665 181521 186523 185609 ] 1478275
|
|
IM Data [1034 1091 1023 1019 1005 973 995 1062 ] 8202
|
|
IM Exclusive_Data [25982 26114 25876 26016 25413 25428 26155 25932 ] 206916
|
|
IM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM Load [0 0 0 0 0 0 0 0 ] 0
|
|
SM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
SM Store [0 0 0 0 0 0 0 0 ] 0
|
|
SM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
SM L1_to_L2 [3 1 0 2 0 4 5 0 ] 15
|
|
SM Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
SM Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
SM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
SM Ack [28 13 0 14 0 7 21 7 ] 90
|
|
SM Data [4 2 0 2 0 1 3 1 ] 13
|
|
SM Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
|
|
SM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM Load [0 0 0 0 0 0 0 0 ] 0
|
|
OM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OM Store [0 0 0 0 0 0 0 0 ] 0
|
|
OM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OM L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
OM Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
OM Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
OM NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
OM Ack [0 7 7 0 0 0 0 7 ] 21
|
|
OM All_acks [0 0 0 0 0 0 0 0 ] 0
|
|
OM All_acks_no_sharers [0 1 1 0 0 0 0 1 ] 3
|
|
OM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ISM Load [0 0 0 0 0 0 0 0 ] 0
|
|
ISM Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
ISM Store [0 0 0 0 0 0 0 0 ] 0
|
|
ISM L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
ISM L1_to_L2 [0 0 0 0 0 0 1 0 ] 1
|
|
ISM Ack [6 24 17 40 25 16 21 28 ] 177
|
|
ISM All_acks_no_sharers [1038 1093 1023 1021 1005 974 998 1063 ] 8215
|
|
ISM Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
M_W Load [0 0 0 0 0 0 0 0 ] 0
|
|
M_W Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
M_W Store [0 0 0 0 0 0 0 0 ] 0
|
|
M_W L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
M_W L1_to_L2 [495 483 546 484 441 445 521 480 ] 3895
|
|
M_W Ack [1722 1778 1846 1696 1767 1619 1591 1608 ] 13627
|
|
M_W All_acks_no_sharers [47214 47146 46942 46830 46905 46447 47077 46986 ] 375547
|
|
M_W Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_W Load [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W Store [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MM_W L1_to_L2 [676 844 599 687 621 569 726 718 ] 5440
|
|
MM_W Ack [2536 2677 2767 2603 2413 2420 2608 2494 ] 20518
|
|
MM_W All_acks_no_sharers [25982 26114 25876 26016 25413 25428 26155 25932 ] 206916
|
|
MM_W Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IS Load [0 0 0 0 0 0 0 0 ] 0
|
|
IS Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IS Store [0 0 0 0 0 0 0 0 ] 0
|
|
IS L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IS L1_to_L2 [494798 492535 496530 491719 491353 489381 497477 491607 ] 3945400
|
|
IS Other_GETX [4 0 4 4 3 2 2 0 ] 19
|
|
IS Other_GETS [3 1 1 5 8 2 5 0 ] 25
|
|
IS Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
IS NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IS Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
IS Ack [344545 343618 342316 342229 342600 339194 343073 342768 ] 2740343
|
|
IS Shared_Ack [45 47 66 60 60 63 46 59 ] 446
|
|
IS Data [1890 1838 1881 1909 1911 1864 1793 1833 ] 14919
|
|
IS Shared_Data [1033 1064 1027 1109 1056 1055 1027 1034 ] 8405
|
|
IS Exclusive_Data [47214 47147 46942 46830 46905 46447 47077 46986 ] 375548
|
|
IS Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SS Load [0 0 0 0 0 0 0 0 ] 0
|
|
SS Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
SS Store [0 0 0 0 0 0 0 0 ] 0
|
|
SS L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
SS L1_to_L2 [745 788 789 851 1045 751 868 853 ] 6690
|
|
SS Ack [3018 3262 3057 3254 3008 3055 2995 2972 ] 24621
|
|
SS Shared_Ack [4 3 2 8 3 4 3 7 ] 34
|
|
SS All_acks [1074 1108 1087 1167 1109 1111 1066 1090 ] 8812
|
|
SS All_acks_no_sharers [1849 1794 1821 1851 1858 1808 1754 1777 ] 14512
|
|
SS Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OI Load [0 0 0 0 0 0 0 0 ] 0
|
|
OI Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OI Store [0 0 0 0 0 0 0 0 ] 0
|
|
OI L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OI L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
OI Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
OI Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OI Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OI Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
OI NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OI Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
OI Writeback_Ack [988 1094 1014 1009 1022 1090 1021 995 ] 8233
|
|
OI Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MI Load [10 11 12 9 7 10 6 12 ] 77
|
|
MI Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MI Store [4 7 4 4 6 5 8 6 ] 44
|
|
MI L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MI L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MI Other_GETX [0 1 0 0 1 2 1 5 ] 10
|
|
MI Other_GETS [3 6 1 5 6 4 4 2 ] 31
|
|
MI Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MI Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MI NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MI Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MI Writeback_Ack [71796 71829 71444 71415 70827 70319 71723 71563 ] 570916
|
|
MI Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
II Load [0 0 0 0 0 0 0 0 ] 0
|
|
II Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
II Store [0 0 0 0 0 0 0 0 ] 0
|
|
II L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
II L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
II Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
II Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
II Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
II NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
II Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
II Writeback_Ack [0 1 0 0 1 2 1 5 ] 10
|
|
II Writeback_Nack [0 0 0 0 0 0 0 0 ] 0
|
|
II Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IT Load [0 0 0 0 0 0 1 1 ] 2
|
|
IT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IT Store [0 0 0 0 0 0 0 0 ] 0
|
|
IT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IT L1_to_L2 [4 0 1 4 0 12 0 5 ] 26
|
|
IT Complete_L2_to_L1 [3 1 1 1 1 1 3 4 ] 15
|
|
|
|
ST Load [0 2 1 1 1 0 0 0 ] 5
|
|
ST Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
ST Store [1 1 0 1 0 0 3 1 ] 7
|
|
ST L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
ST L1_to_L2 [16 28 14 16 2 10 15 7 ] 108
|
|
ST Complete_L2_to_L1 [6 7 1 2 1 2 5 4 ] 28
|
|
|
|
OT Load [1 0 0 1 0 0 0 0 ] 2
|
|
OT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OT Store [0 1 1 0 0 0 0 0 ] 2
|
|
OT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OT L1_to_L2 [2 0 22 1 0 5 0 0 ] 30
|
|
OT Complete_L2_to_L1 [1 1 2 1 0 2 0 1 ] 8
|
|
|
|
MT Load [10 17 12 12 13 12 8 17 ] 101
|
|
MT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MT Store [5 7 2 7 8 8 10 11 ] 58
|
|
MT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MT L1_to_L2 [154 168 108 143 148 156 141 241 ] 1259
|
|
MT Complete_L2_to_L1 [38 50 37 37 44 53 36 52 ] 347
|
|
|
|
MMT Load [9 10 3 6 3 10 2 5 ] 48
|
|
MMT Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MMT Store [4 3 3 4 2 2 9 3 ] 30
|
|
MMT L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MMT L1_to_L2 [171 79 60 102 32 107 97 95 ] 743
|
|
MMT Complete_L2_to_L1 [27 28 24 24 16 28 24 24 ] 195
|
|
|
|
MI_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Writeback_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
MI_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F All_acks [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
MM_F Block_Ack [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
IM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Data [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
|
|
IM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
ISM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
ISM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
SM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Data [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Exclusive_Data [0 0 0 0 0 0 0 0 ] 0
|
|
SM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
OM_F Load [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Store [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Other_GETX [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Other_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Merged_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Other_GETS_No_Mig [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F NC_DMA_GETS [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Invalidate [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Ack [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F All_acks [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
OM_F Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
MM_WF Load [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Ifetch [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Store [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF L2_Replacement [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF L1_to_L2 [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Ack [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF All_acks_no_sharers [0 0 0 0 0 0 0 0 ] 0
|
|
MM_WF Flush_line [0 0 0 0 0 0 0 0 ] 0
|
|
|
|
Cache Stats: system.l1_cntrl1.L1IcacheMemory
|
|
system.l1_cntrl1.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl1.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl1.L1DcacheMemory
|
|
system.l1_cntrl1.L1DcacheMemory_total_misses: 75857
|
|
system.l1_cntrl1.L1DcacheMemory_total_demand_misses: 75857
|
|
system.l1_cntrl1.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl1.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl1.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_request_type_LD: 65.1594%
|
|
system.l1_cntrl1.L1DcacheMemory_request_type_ST: 34.8406%
|
|
|
|
system.l1_cntrl1.L1DcacheMemory_access_mode_type_Supervisor: 75857 100%
|
|
|
|
Cache Stats: system.l1_cntrl1.L2cacheMemory
|
|
system.l1_cntrl1.L2cacheMemory_total_misses: 75857
|
|
system.l1_cntrl1.L2cacheMemory_total_demand_misses: 75857
|
|
system.l1_cntrl1.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl1.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl1.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl1.L2cacheMemory_request_type_LD: 65.1594%
|
|
system.l1_cntrl1.L2cacheMemory_request_type_ST: 34.8406%
|
|
|
|
system.l1_cntrl1.L2cacheMemory_access_mode_type_Supervisor: 75857 100%
|
|
|
|
Cache Stats: system.l1_cntrl2.L1IcacheMemory
|
|
system.l1_cntrl2.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl2.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl2.L1DcacheMemory
|
|
system.l1_cntrl2.L1DcacheMemory_total_misses: 77121
|
|
system.l1_cntrl2.L1DcacheMemory_total_demand_misses: 77121
|
|
system.l1_cntrl2.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl2.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl2.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_request_type_LD: 64.7463%
|
|
system.l1_cntrl2.L1DcacheMemory_request_type_ST: 35.2537%
|
|
|
|
system.l1_cntrl2.L1DcacheMemory_access_mode_type_Supervisor: 77121 100%
|
|
|
|
Cache Stats: system.l1_cntrl2.L2cacheMemory
|
|
system.l1_cntrl2.L2cacheMemory_total_misses: 77121
|
|
system.l1_cntrl2.L2cacheMemory_total_demand_misses: 77121
|
|
system.l1_cntrl2.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl2.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl2.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl2.L2cacheMemory_request_type_LD: 64.7463%
|
|
system.l1_cntrl2.L2cacheMemory_request_type_ST: 35.2537%
|
|
|
|
system.l1_cntrl2.L2cacheMemory_access_mode_type_Supervisor: 77121 100%
|
|
|
|
Cache Stats: system.l1_cntrl3.L1IcacheMemory
|
|
system.l1_cntrl3.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl3.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl3.L1DcacheMemory
|
|
system.l1_cntrl3.L1DcacheMemory_total_misses: 76938
|
|
system.l1_cntrl3.L1DcacheMemory_total_demand_misses: 76938
|
|
system.l1_cntrl3.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl3.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl3.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_request_type_LD: 64.873%
|
|
system.l1_cntrl3.L1DcacheMemory_request_type_ST: 35.127%
|
|
|
|
system.l1_cntrl3.L1DcacheMemory_access_mode_type_Supervisor: 76938 100%
|
|
|
|
Cache Stats: system.l1_cntrl3.L2cacheMemory
|
|
system.l1_cntrl3.L2cacheMemory_total_misses: 76938
|
|
system.l1_cntrl3.L2cacheMemory_total_demand_misses: 76938
|
|
system.l1_cntrl3.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl3.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl3.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl3.L2cacheMemory_request_type_LD: 64.873%
|
|
system.l1_cntrl3.L2cacheMemory_request_type_ST: 35.127%
|
|
|
|
system.l1_cntrl3.L2cacheMemory_access_mode_type_Supervisor: 76938 100%
|
|
|
|
Cache Stats: system.l1_cntrl4.L1IcacheMemory
|
|
system.l1_cntrl4.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl4.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl4.L1DcacheMemory
|
|
system.l1_cntrl4.L1DcacheMemory_total_misses: 77236
|
|
system.l1_cntrl4.L1DcacheMemory_total_demand_misses: 77236
|
|
system.l1_cntrl4.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl4.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl4.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_request_type_LD: 64.9788%
|
|
system.l1_cntrl4.L1DcacheMemory_request_type_ST: 35.0212%
|
|
|
|
system.l1_cntrl4.L1DcacheMemory_access_mode_type_Supervisor: 77236 100%
|
|
|
|
Cache Stats: system.l1_cntrl4.L2cacheMemory
|
|
system.l1_cntrl4.L2cacheMemory_total_misses: 77236
|
|
system.l1_cntrl4.L2cacheMemory_total_demand_misses: 77236
|
|
system.l1_cntrl4.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl4.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl4.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl4.L2cacheMemory_request_type_LD: 64.9788%
|
|
system.l1_cntrl4.L2cacheMemory_request_type_ST: 35.0212%
|
|
|
|
system.l1_cntrl4.L2cacheMemory_access_mode_type_Supervisor: 77236 100%
|
|
|
|
Cache Stats: system.l1_cntrl5.L1IcacheMemory
|
|
system.l1_cntrl5.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl5.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl5.L1DcacheMemory
|
|
system.l1_cntrl5.L1DcacheMemory_total_misses: 77346
|
|
system.l1_cntrl5.L1DcacheMemory_total_demand_misses: 77346
|
|
system.l1_cntrl5.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl5.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl5.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_request_type_LD: 64.7829%
|
|
system.l1_cntrl5.L1DcacheMemory_request_type_ST: 35.2171%
|
|
|
|
system.l1_cntrl5.L1DcacheMemory_access_mode_type_Supervisor: 77346 100%
|
|
|
|
Cache Stats: system.l1_cntrl5.L2cacheMemory
|
|
system.l1_cntrl5.L2cacheMemory_total_misses: 77346
|
|
system.l1_cntrl5.L2cacheMemory_total_demand_misses: 77346
|
|
system.l1_cntrl5.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl5.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl5.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl5.L2cacheMemory_request_type_LD: 64.7829%
|
|
system.l1_cntrl5.L2cacheMemory_request_type_ST: 35.2171%
|
|
|
|
system.l1_cntrl5.L2cacheMemory_access_mode_type_Supervisor: 77346 100%
|
|
|
|
Cache Stats: system.l1_cntrl6.L1IcacheMemory
|
|
system.l1_cntrl6.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl6.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl6.L1DcacheMemory
|
|
system.l1_cntrl6.L1DcacheMemory_total_misses: 76817
|
|
system.l1_cntrl6.L1DcacheMemory_total_demand_misses: 76817
|
|
system.l1_cntrl6.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl6.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl6.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_request_type_LD: 64.9544%
|
|
system.l1_cntrl6.L1DcacheMemory_request_type_ST: 35.0456%
|
|
|
|
system.l1_cntrl6.L1DcacheMemory_access_mode_type_Supervisor: 76817 100%
|
|
|
|
Cache Stats: system.l1_cntrl6.L2cacheMemory
|
|
system.l1_cntrl6.L2cacheMemory_total_misses: 76817
|
|
system.l1_cntrl6.L2cacheMemory_total_demand_misses: 76817
|
|
system.l1_cntrl6.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl6.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl6.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl6.L2cacheMemory_request_type_LD: 64.9544%
|
|
system.l1_cntrl6.L2cacheMemory_request_type_ST: 35.0456%
|
|
|
|
system.l1_cntrl6.L2cacheMemory_access_mode_type_Supervisor: 76817 100%
|
|
|
|
Cache Stats: system.l1_cntrl7.L1IcacheMemory
|
|
system.l1_cntrl7.L1IcacheMemory_total_misses: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_demand_misses: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl7.L1IcacheMemory_total_hw_prefetches: 0
|
|
|
|
|
|
Cache Stats: system.l1_cntrl7.L1DcacheMemory
|
|
system.l1_cntrl7.L1DcacheMemory_total_misses: 76953
|
|
system.l1_cntrl7.L1DcacheMemory_total_demand_misses: 76953
|
|
system.l1_cntrl7.L1DcacheMemory_total_prefetches: 0
|
|
system.l1_cntrl7.L1DcacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl7.L1DcacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_request_type_LD: 64.8331%
|
|
system.l1_cntrl7.L1DcacheMemory_request_type_ST: 35.1669%
|
|
|
|
system.l1_cntrl7.L1DcacheMemory_access_mode_type_Supervisor: 76953 100%
|
|
|
|
Cache Stats: system.l1_cntrl7.L2cacheMemory
|
|
system.l1_cntrl7.L2cacheMemory_total_misses: 76953
|
|
system.l1_cntrl7.L2cacheMemory_total_demand_misses: 76953
|
|
system.l1_cntrl7.L2cacheMemory_total_prefetches: 0
|
|
system.l1_cntrl7.L2cacheMemory_total_sw_prefetches: 0
|
|
system.l1_cntrl7.L2cacheMemory_total_hw_prefetches: 0
|
|
|
|
system.l1_cntrl7.L2cacheMemory_request_type_LD: 64.8331%
|
|
system.l1_cntrl7.L2cacheMemory_request_type_ST: 35.1669%
|
|
|
|
system.l1_cntrl7.L2cacheMemory_access_mode_type_Supervisor: 76953 100%
|
|
|
|
Cache Stats: system.dir_cntrl0.probeFilter
|
|
system.dir_cntrl0.probeFilter_total_misses: 0
|
|
system.dir_cntrl0.probeFilter_total_demand_misses: 0
|
|
system.dir_cntrl0.probeFilter_total_prefetches: 0
|
|
system.dir_cntrl0.probeFilter_total_sw_prefetches: 0
|
|
system.dir_cntrl0.probeFilter_total_hw_prefetches: 0
|
|
|
|
|
|
Memory controller: system.dir_cntrl0.memBuffer:
|
|
memory_total_requests: 806930
|
|
memory_reads: 594122
|
|
memory_writes: 212776
|
|
memory_refreshes: 39853
|
|
memory_total_request_delays: 51498750
|
|
memory_delays_per_request: 63.8206
|
|
memory_delays_in_input_queue: 643231
|
|
memory_delays_behind_head_of_bank_queue: 21064894
|
|
memory_delays_stalled_at_head_of_bank_queue: 29790625
|
|
memory_stalls_for_bank_busy: 4493474
|
|
memory_stalls_for_random_busy: 0
|
|
memory_stalls_for_anti_starvation: 7575671
|
|
memory_stalls_for_arbitration: 6083551
|
|
memory_stalls_for_bus: 8248278
|
|
memory_stalls_for_tfaw: 0
|
|
memory_stalls_for_read_write_turnaround: 2039991
|
|
memory_stalls_for_read_read_turnaround: 1349660
|
|
accesses_per_bank: 25394 25147 25249 25452 25456 25358 25579 25279 25469 25293 25305 25375 25044 25055 25245 25044 25128 25227 25252 25145 25222 25167 25232 25093 25055 24752 25158 24793 25021 25318 25415 25208
|
|
|
|
--- Directory ---
|
|
- Event Counts -
|
|
GETX [218369 ] 218369
|
|
GETS [404869 ] 404869
|
|
PUT [579376 ] 579376
|
|
Unblock [10 ] 10
|
|
UnblockS [23324 ] 23324
|
|
UnblockM [590681 ] 590681
|
|
Writeback_Clean [8134 ] 8134
|
|
Writeback_Dirty [99 ] 99
|
|
Writeback_Exclusive_Clean [358228 ] 358228
|
|
Writeback_Exclusive_Dirty [212686 ] 212686
|
|
Pf_Replacement [0 ] 0
|
|
DMA_READ [0 ] 0
|
|
DMA_WRITE [0 ] 0
|
|
Memory_Data [594120 ] 594120
|
|
Memory_Ack [212774 ] 212774
|
|
Ack [0 ] 0
|
|
Shared_Ack [0 ] 0
|
|
Shared_Data [0 ] 0
|
|
Data [0 ] 0
|
|
Exclusive_Data [0 ] 0
|
|
All_acks_and_shared_data [0 ] 0
|
|
All_acks_and_owner_data [0 ] 0
|
|
All_acks_and_data_no_sharers [0 ] 0
|
|
All_Unblocks [28 ] 28
|
|
GETF [0 ] 0
|
|
PUTF [0 ] 0
|
|
|
|
- Transitions -
|
|
NX GETX [54 ] 54
|
|
NX GETS [108 ] 108
|
|
NX PUT [8243 ] 8243
|
|
NX Pf_Replacement [0 ] 0
|
|
NX DMA_READ [0 ] 0
|
|
NX DMA_WRITE [0 ] 0
|
|
NX GETF [0 ] 0
|
|
|
|
NO GETX [6834 ] 6834
|
|
NO GETS [12862 ] 12862
|
|
NO PUT [570916 ] 570916
|
|
NO Pf_Replacement [0 ] 0
|
|
NO DMA_READ [0 ] 0
|
|
NO DMA_WRITE [0 ] 0
|
|
NO GETF [0 ] 0
|
|
|
|
S GETX [0 ] 0
|
|
S GETS [0 ] 0
|
|
S PUT [0 ] 0
|
|
S Pf_Replacement [0 ] 0
|
|
S DMA_READ [0 ] 0
|
|
S DMA_WRITE [0 ] 0
|
|
S GETF [0 ] 0
|
|
|
|
O GETX [8154 ] 8154
|
|
O GETS [14919 ] 14919
|
|
O PUT [0 ] 0
|
|
O Pf_Replacement [0 ] 0
|
|
O DMA_READ [0 ] 0
|
|
O DMA_WRITE [0 ] 0
|
|
O GETF [0 ] 0
|
|
|
|
E GETX [200097 ] 200097
|
|
E GETS [370975 ] 370975
|
|
E PUT [0 ] 0
|
|
E DMA_READ [0 ] 0
|
|
E DMA_WRITE [0 ] 0
|
|
E GETF [0 ] 0
|
|
|
|
O_R GETX [0 ] 0
|
|
O_R GETS [0 ] 0
|
|
O_R PUT [0 ] 0
|
|
O_R Pf_Replacement [0 ] 0
|
|
O_R DMA_READ [0 ] 0
|
|
O_R DMA_WRITE [0 ] 0
|
|
O_R Ack [0 ] 0
|
|
O_R All_acks_and_data_no_sharers [0 ] 0
|
|
O_R GETF [0 ] 0
|
|
|
|
S_R GETX [0 ] 0
|
|
S_R GETS [0 ] 0
|
|
S_R PUT [0 ] 0
|
|
S_R Pf_Replacement [0 ] 0
|
|
S_R DMA_READ [0 ] 0
|
|
S_R DMA_WRITE [0 ] 0
|
|
S_R Ack [0 ] 0
|
|
S_R Data [0 ] 0
|
|
S_R All_acks_and_data_no_sharers [0 ] 0
|
|
S_R GETF [0 ] 0
|
|
|
|
NO_R GETX [0 ] 0
|
|
NO_R GETS [0 ] 0
|
|
NO_R PUT [0 ] 0
|
|
NO_R Pf_Replacement [0 ] 0
|
|
NO_R DMA_READ [0 ] 0
|
|
NO_R DMA_WRITE [0 ] 0
|
|
NO_R Ack [0 ] 0
|
|
NO_R Data [0 ] 0
|
|
NO_R Exclusive_Data [0 ] 0
|
|
NO_R All_acks_and_data_no_sharers [0 ] 0
|
|
NO_R GETF [0 ] 0
|
|
|
|
NO_B GETX [18 ] 18
|
|
NO_B GETS [28 ] 28
|
|
NO_B PUT [217 ] 217
|
|
NO_B UnblockS [8362 ] 8362
|
|
NO_B UnblockM [590650 ] 590650
|
|
NO_B Pf_Replacement [0 ] 0
|
|
NO_B DMA_READ [0 ] 0
|
|
NO_B DMA_WRITE [0 ] 0
|
|
NO_B GETF [0 ] 0
|
|
|
|
NO_B_X GETX [0 ] 0
|
|
NO_B_X GETS [0 ] 0
|
|
NO_B_X PUT [0 ] 0
|
|
NO_B_X UnblockS [5 ] 5
|
|
NO_B_X UnblockM [13 ] 13
|
|
NO_B_X Pf_Replacement [0 ] 0
|
|
NO_B_X DMA_READ [0 ] 0
|
|
NO_B_X DMA_WRITE [0 ] 0
|
|
NO_B_X GETF [0 ] 0
|
|
|
|
NO_B_S GETX [0 ] 0
|
|
NO_B_S GETS [0 ] 0
|
|
NO_B_S PUT [0 ] 0
|
|
NO_B_S UnblockS [10 ] 10
|
|
NO_B_S UnblockM [18 ] 18
|
|
NO_B_S Pf_Replacement [0 ] 0
|
|
NO_B_S DMA_READ [0 ] 0
|
|
NO_B_S DMA_WRITE [0 ] 0
|
|
NO_B_S GETF [0 ] 0
|
|
|
|
NO_B_S_W GETX [0 ] 0
|
|
NO_B_S_W GETS [0 ] 0
|
|
NO_B_S_W PUT [0 ] 0
|
|
NO_B_S_W UnblockS [28 ] 28
|
|
NO_B_S_W Pf_Replacement [0 ] 0
|
|
NO_B_S_W DMA_READ [0 ] 0
|
|
NO_B_S_W DMA_WRITE [0 ] 0
|
|
NO_B_S_W All_Unblocks [28 ] 28
|
|
NO_B_S_W GETF [0 ] 0
|
|
|
|
O_B GETX [0 ] 0
|
|
O_B GETS [0 ] 0
|
|
O_B PUT [0 ] 0
|
|
O_B UnblockS [14919 ] 14919
|
|
O_B UnblockM [0 ] 0
|
|
O_B Pf_Replacement [0 ] 0
|
|
O_B DMA_READ [0 ] 0
|
|
O_B DMA_WRITE [0 ] 0
|
|
O_B GETF [0 ] 0
|
|
|
|
NO_B_W GETX [2005 ] 2005
|
|
NO_B_W GETS [3743 ] 3743
|
|
NO_B_W PUT [0 ] 0
|
|
NO_B_W UnblockS [0 ] 0
|
|
NO_B_W UnblockM [0 ] 0
|
|
NO_B_W Pf_Replacement [0 ] 0
|
|
NO_B_W DMA_READ [0 ] 0
|
|
NO_B_W DMA_WRITE [0 ] 0
|
|
NO_B_W Memory_Data [579201 ] 579201
|
|
NO_B_W GETF [0 ] 0
|
|
|
|
O_B_W GETX [51 ] 51
|
|
O_B_W GETS [90 ] 90
|
|
O_B_W PUT [0 ] 0
|
|
O_B_W UnblockS [0 ] 0
|
|
O_B_W Pf_Replacement [0 ] 0
|
|
O_B_W DMA_READ [0 ] 0
|
|
O_B_W DMA_WRITE [0 ] 0
|
|
O_B_W Memory_Data [14919 ] 14919
|
|
O_B_W GETF [0 ] 0
|
|
|
|
NO_W GETX [0 ] 0
|
|
NO_W GETS [0 ] 0
|
|
NO_W PUT [0 ] 0
|
|
NO_W Pf_Replacement [0 ] 0
|
|
NO_W DMA_READ [0 ] 0
|
|
NO_W DMA_WRITE [0 ] 0
|
|
NO_W Memory_Data [0 ] 0
|
|
NO_W GETF [0 ] 0
|
|
|
|
O_W GETX [0 ] 0
|
|
O_W GETS [0 ] 0
|
|
O_W PUT [0 ] 0
|
|
O_W Pf_Replacement [0 ] 0
|
|
O_W DMA_READ [0 ] 0
|
|
O_W DMA_WRITE [0 ] 0
|
|
O_W Memory_Data [0 ] 0
|
|
O_W GETF [0 ] 0
|
|
|
|
NO_DW_B_W GETX [0 ] 0
|
|
NO_DW_B_W GETS [0 ] 0
|
|
NO_DW_B_W PUT [0 ] 0
|
|
NO_DW_B_W Pf_Replacement [0 ] 0
|
|
NO_DW_B_W DMA_READ [0 ] 0
|
|
NO_DW_B_W DMA_WRITE [0 ] 0
|
|
NO_DW_B_W Ack [0 ] 0
|
|
NO_DW_B_W Data [0 ] 0
|
|
NO_DW_B_W Exclusive_Data [0 ] 0
|
|
NO_DW_B_W All_acks_and_data_no_sharers [0 ] 0
|
|
NO_DW_B_W GETF [0 ] 0
|
|
|
|
NO_DR_B_W GETX [0 ] 0
|
|
NO_DR_B_W GETS [0 ] 0
|
|
NO_DR_B_W PUT [0 ] 0
|
|
NO_DR_B_W Pf_Replacement [0 ] 0
|
|
NO_DR_B_W DMA_READ [0 ] 0
|
|
NO_DR_B_W DMA_WRITE [0 ] 0
|
|
NO_DR_B_W Memory_Data [0 ] 0
|
|
NO_DR_B_W Ack [0 ] 0
|
|
NO_DR_B_W Shared_Ack [0 ] 0
|
|
NO_DR_B_W Shared_Data [0 ] 0
|
|
NO_DR_B_W Data [0 ] 0
|
|
NO_DR_B_W Exclusive_Data [0 ] 0
|
|
NO_DR_B_W GETF [0 ] 0
|
|
|
|
NO_DR_B_D GETX [0 ] 0
|
|
NO_DR_B_D GETS [0 ] 0
|
|
NO_DR_B_D PUT [0 ] 0
|
|
NO_DR_B_D Pf_Replacement [0 ] 0
|
|
NO_DR_B_D DMA_READ [0 ] 0
|
|
NO_DR_B_D DMA_WRITE [0 ] 0
|
|
NO_DR_B_D Ack [0 ] 0
|
|
NO_DR_B_D Shared_Ack [0 ] 0
|
|
NO_DR_B_D Shared_Data [0 ] 0
|
|
NO_DR_B_D Data [0 ] 0
|
|
NO_DR_B_D Exclusive_Data [0 ] 0
|
|
NO_DR_B_D All_acks_and_shared_data [0 ] 0
|
|
NO_DR_B_D All_acks_and_owner_data [0 ] 0
|
|
NO_DR_B_D All_acks_and_data_no_sharers [0 ] 0
|
|
NO_DR_B_D GETF [0 ] 0
|
|
|
|
NO_DR_B GETX [0 ] 0
|
|
NO_DR_B GETS [0 ] 0
|
|
NO_DR_B PUT [0 ] 0
|
|
NO_DR_B Pf_Replacement [0 ] 0
|
|
NO_DR_B DMA_READ [0 ] 0
|
|
NO_DR_B DMA_WRITE [0 ] 0
|
|
NO_DR_B Ack [0 ] 0
|
|
NO_DR_B Shared_Ack [0 ] 0
|
|
NO_DR_B Shared_Data [0 ] 0
|
|
NO_DR_B Data [0 ] 0
|
|
NO_DR_B Exclusive_Data [0 ] 0
|
|
NO_DR_B All_acks_and_shared_data [0 ] 0
|
|
NO_DR_B All_acks_and_owner_data [0 ] 0
|
|
NO_DR_B All_acks_and_data_no_sharers [0 ] 0
|
|
NO_DR_B GETF [0 ] 0
|
|
|
|
NO_DW_W GETX [0 ] 0
|
|
NO_DW_W GETS [0 ] 0
|
|
NO_DW_W PUT [0 ] 0
|
|
NO_DW_W Pf_Replacement [0 ] 0
|
|
NO_DW_W DMA_READ [0 ] 0
|
|
NO_DW_W DMA_WRITE [0 ] 0
|
|
NO_DW_W Memory_Ack [0 ] 0
|
|
NO_DW_W GETF [0 ] 0
|
|
|
|
O_DR_B_W GETX [0 ] 0
|
|
O_DR_B_W GETS [0 ] 0
|
|
O_DR_B_W PUT [0 ] 0
|
|
O_DR_B_W Pf_Replacement [0 ] 0
|
|
O_DR_B_W DMA_READ [0 ] 0
|
|
O_DR_B_W DMA_WRITE [0 ] 0
|
|
O_DR_B_W Memory_Data [0 ] 0
|
|
O_DR_B_W Ack [0 ] 0
|
|
O_DR_B_W Shared_Ack [0 ] 0
|
|
O_DR_B_W GETF [0 ] 0
|
|
|
|
O_DR_B GETX [0 ] 0
|
|
O_DR_B GETS [0 ] 0
|
|
O_DR_B PUT [0 ] 0
|
|
O_DR_B Pf_Replacement [0 ] 0
|
|
O_DR_B DMA_READ [0 ] 0
|
|
O_DR_B DMA_WRITE [0 ] 0
|
|
O_DR_B Ack [0 ] 0
|
|
O_DR_B Shared_Ack [0 ] 0
|
|
O_DR_B All_acks_and_owner_data [0 ] 0
|
|
O_DR_B All_acks_and_data_no_sharers [0 ] 0
|
|
O_DR_B GETF [0 ] 0
|
|
|
|
WB GETX [94 ] 94
|
|
WB GETS [184 ] 184
|
|
WB PUT [0 ] 0
|
|
WB Unblock [10 ] 10
|
|
WB Writeback_Clean [8134 ] 8134
|
|
WB Writeback_Dirty [99 ] 99
|
|
WB Writeback_Exclusive_Clean [358228 ] 358228
|
|
WB Writeback_Exclusive_Dirty [212686 ] 212686
|
|
WB Pf_Replacement [0 ] 0
|
|
WB DMA_READ [0 ] 0
|
|
WB DMA_WRITE [0 ] 0
|
|
WB GETF [0 ] 0
|
|
|
|
WB_O_W GETX [0 ] 0
|
|
WB_O_W GETS [1 ] 1
|
|
WB_O_W PUT [0 ] 0
|
|
WB_O_W Pf_Replacement [0 ] 0
|
|
WB_O_W DMA_READ [0 ] 0
|
|
WB_O_W DMA_WRITE [0 ] 0
|
|
WB_O_W Memory_Ack [99 ] 99
|
|
WB_O_W GETF [0 ] 0
|
|
|
|
WB_E_W GETX [1062 ] 1062
|
|
WB_E_W GETS [1959 ] 1959
|
|
WB_E_W PUT [0 ] 0
|
|
WB_E_W Pf_Replacement [0 ] 0
|
|
WB_E_W DMA_READ [0 ] 0
|
|
WB_E_W DMA_WRITE [0 ] 0
|
|
WB_E_W Memory_Ack [212675 ] 212675
|
|
WB_E_W GETF [0 ] 0
|
|
|
|
NO_F GETX [0 ] 0
|
|
NO_F GETS [0 ] 0
|
|
NO_F PUT [0 ] 0
|
|
NO_F UnblockM [0 ] 0
|
|
NO_F Pf_Replacement [0 ] 0
|
|
NO_F GETF [0 ] 0
|
|
NO_F PUTF [0 ] 0
|
|
|
|
NO_F_W GETX [0 ] 0
|
|
NO_F_W GETS [0 ] 0
|
|
NO_F_W PUT [0 ] 0
|
|
NO_F_W Pf_Replacement [0 ] 0
|
|
NO_F_W DMA_READ [0 ] 0
|
|
NO_F_W DMA_WRITE [0 ] 0
|
|
NO_F_W Memory_Data [0 ] 0
|
|
NO_F_W GETF [0 ] 0
|
|
|