10e6450120
Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses.
25 lines
1.2 KiB
Plaintext
Executable file
25 lines
1.2 KiB
Plaintext
Executable file
gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Oct 15 2013 18:24:51
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gem5 started Oct 16 2013 01:34:33
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gem5 executing on zizzer
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command line: build/ALPHA/gem5.opt -d build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/o3-timing -re tests/run.py build/ALPHA/tests/opt/long/se/70.twolf/alpha/tru64/o3-timing
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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info: Increasing stack size by one page.
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TimberWolfSC version:v4.3a date:Mon Jan 25 18:50:36 EST 1988
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Standard Cell Placement and Global Routing Program
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Authors: Carl Sechen, Bill Swartz
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Yale University
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1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
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31 32 33 34 35 36 37 38 39 40 41 42 43 44 45
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46 47 48 49 50 51 52 53 54 55 56 57 58 59 60
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61 62 63 64 65 66 67 68 69 70 71 72 73 74 75
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76 77 78 79 80 81 82 83 84 85 86 87 88 89 90
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91 92 93 94 95 96 97 98 99 100 101 102 103 104 105
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106 107 108 109 110 111 112 113 114 115 116 117 118 119 120
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122 123 124 Exiting @ tick 23492267500 because target called exit()
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