10e6450120
Update stats for recent changes. Mostly minor changes in register access stats due to addition of new cc register type and slightly different (and more accurate) classification of int vs. fp register accesses.
12 lines
551 B
Plaintext
Executable file
12 lines
551 B
Plaintext
Executable file
gem5 Simulator System. http://gem5.org
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gem5 is copyrighted software; use the --copyright option for details.
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gem5 compiled Oct 16 2013 01:36:42
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gem5 started Oct 16 2013 01:55:13
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gem5 executing on zizzer
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command line: build/ARM/gem5.opt -d build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing -re tests/run.py build/ARM/tests/opt/quick/se/00.hello/arm/linux/o3-timing
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Global frequency set at 1000000000000 ticks per second
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info: Entering event queue @ 0. Starting simulation...
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Hello world!
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Exiting @ tick 16494000 because target called exit()
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