Ron Dreslinski cc1feb9f6d Fix memtester to use functional access, fix cache to work functionally now that we could test it. ... src/cpu/memtest/memtest.cc: Fix memtest to do functional accesses src/mem/cache/cache_impl.hh: Fix cache to handle functional accesses properly based on memtester changes Still need to fix functional accesses in timing mode now that the memtester can test it. --HG-- extra : convert_revision : a6dbca4dc23763ca13560fbf5d41a23ddf021113		2006-10-19 21:07:53 -04:00
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arch	fix a bug in CopyStringOut. dprintk appears to work again.	2006-10-13 14:28:46 -04:00
base	Add "All" compund flag to enable all defined trace flags.	2006-10-19 10:32:08 -07:00
cpu	Fix memtester to use functional access, fix cache to work functionally now that we could test it.	2006-10-19 21:07:53 -04:00
dev	Fix for DMA's in FS caches.	2006-10-13 15:47:05 -04:00
doxygen	Fix up doxygen.	2006-08-14 19:25:07 -04:00
kern	Allocate new thread stacks and shared mem region via Process page table	2006-10-08 04:29:40 -04:00
mem	Fix memtester to use functional access, fix cache to work functionally now that we could test it.	2006-10-19 21:07:53 -04:00
python	how did i not commit this already? the other way doesn't seem to work, need to convert to System ptr first to access System method.	2006-10-18 18:04:53 -04:00
sim	Add new event priority for trace enable events so	2006-10-19 10:21:23 -07:00
unittest	Merge iceaxe.:/Volumes/work/research/m5/head	2006-06-11 22:01:34 -04:00
Doxyfile	Fix up doxygen.	2006-08-14 19:25:07 -04:00
SConscript	Two minor fixes.	2006-10-10 01:49:46 -04:00