8aaa39e93d
This change adds a master id to each request object which can be used identify every device in the system that is capable of issuing a request. This is part of the way to removing the numCpus+1 stats in the cache and replacing them with the master ids. This is one of a series of changes that make way for the stats output to be changed to python.
136 lines
4.8 KiB
C++
136 lines
4.8 KiB
C++
/*
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* Copyright (c) 2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Ron Dreslinski
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* Steve Reinhardt
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*/
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/**
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* @file
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* Stride Prefetcher template instantiations.
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*/
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#include "base/trace.hh"
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#include "debug/HWPrefetch.hh"
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#include "mem/cache/prefetch/stride.hh"
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void
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StridePrefetcher::calculatePrefetch(PacketPtr &pkt, std::list<Addr> &addresses,
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std::list<Tick> &delays)
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{
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if (!pkt->req->hasPC()) {
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DPRINTF(HWPrefetch, "ignoring request with no PC");
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return;
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}
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Addr blk_addr = pkt->getAddr() & ~(Addr)(blkSize-1);
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MasterID master_id = useMasterId ? pkt->req->masterId() : 0;
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Addr pc = pkt->req->getPC();
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assert(master_id < Max_Contexts);
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std::list<StrideEntry*> &tab = table[master_id];
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/* Scan Table for instAddr Match */
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std::list<StrideEntry*>::iterator iter;
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for (iter = tab.begin(); iter != tab.end(); iter++) {
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if ((*iter)->instAddr == pc)
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break;
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}
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if (iter != tab.end()) {
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// Hit in table
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int new_stride = blk_addr - (*iter)->missAddr;
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bool stride_match = (new_stride == (*iter)->stride);
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if (stride_match && new_stride != 0) {
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if ((*iter)->confidence < Max_Conf)
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(*iter)->confidence++;
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} else {
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(*iter)->stride = new_stride;
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if ((*iter)->confidence > Min_Conf)
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(*iter)->confidence = 0;
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}
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DPRINTF(HWPrefetch, "hit: PC %x blk_addr %x stride %d (%s), conf %d\n",
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pc, blk_addr, new_stride, stride_match ? "match" : "change",
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(*iter)->confidence);
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(*iter)->missAddr = blk_addr;
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if ((*iter)->confidence <= 0)
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return;
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for (int d = 1; d <= degree; d++) {
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Addr new_addr = blk_addr + d * new_stride;
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if (pageStop && !samePage(blk_addr, new_addr)) {
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// Spanned the page, so now stop
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pfSpanPage += degree - d + 1;
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return;
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} else {
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DPRINTF(HWPrefetch, " queuing prefetch to %x @ %d\n",
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new_addr, latency);
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addresses.push_back(new_addr);
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delays.push_back(latency);
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}
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}
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} else {
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// Miss in table
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// Find lowest confidence and replace
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DPRINTF(HWPrefetch, "miss: PC %x blk_addr %x\n", pc, blk_addr);
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if (tab.size() >= 256) { //set default table size is 256
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std::list<StrideEntry*>::iterator min_pos = tab.begin();
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int min_conf = (*min_pos)->confidence;
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for (iter = min_pos, ++iter; iter != tab.end(); ++iter) {
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if ((*iter)->confidence < min_conf){
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min_pos = iter;
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min_conf = (*iter)->confidence;
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}
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}
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DPRINTF(HWPrefetch, " replacing PC %x\n", (*min_pos)->instAddr);
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// free entry and delete it
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delete *min_pos;
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tab.erase(min_pos);
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}
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StrideEntry *new_entry = new StrideEntry;
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new_entry->instAddr = pc;
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new_entry->missAddr = blk_addr;
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new_entry->stride = 0;
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new_entry->confidence = 0;
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tab.push_back(new_entry);
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}
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}
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StridePrefetcher*
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StridePrefetcherParams::create()
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{
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return new StridePrefetcher(this);
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}
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