gem5/src/arch/x86/isa/bitfields.isa
Nilay Vaish 0ef3dcc27b x86: decode instructions with vex prefix
This patch updates the x86 decoder so that it can decode instructions with vex
prefix. It also updates the isa with opcodes from vex opcode maps 1, 2 and 3.
Note that none of the instructions have been implemented yet. The
implementations would be provided in due course of time.
2015-07-17 11:31:22 -05:00

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// Copyright (c) 2007 The Hewlett-Packard Development Company
// All rights reserved.
//
// The license below extends only to copyright in the software and shall
// not be construed as granting a license to any other intellectual
// property including but not limited to intellectual property relating
// to a hardware implementation of the functionality of the software
// licensed hereunder. You may use the software subject to the license
// terms below provided that you ensure that this notice is replicated
// unmodified and in its entirety in all distributions of the software,
// modified or unmodified, in source code or in binary form.
//
// Redistribution and use in source and binary forms, with or without
// modification, are permitted provided that the following conditions are
// met: redistributions of source code must retain the above copyright
// notice, this list of conditions and the following disclaimer;
// redistributions in binary form must reproduce the above copyright
// notice, this list of conditions and the following disclaimer in the
// documentation and/or other materials provided with the distribution;
// neither the name of the copyright holders nor the names of its
// contributors may be used to endorse or promote products derived from
// this software without specific prior written permission.
//
// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
//
// Authors: Gabe Black
////////////////////////////////////////////////////////////////////
//
// Bitfield definitions.
//
//REX prefix
def bitfield REX rex;
def bitfield REX_PRESENT rex.present;
def bitfield REX_W rex.w;
def bitfield REX_R rex.r;
def bitfield REX_X rex.x;
def bitfield REX_B rex.b;
//Legacy prefixes
def bitfield LEGACY legacy;
def bitfield LEGACY_DECODEVAL legacy.decodeVal;
def bitfield LEGACY_REPNE legacy.repne;
def bitfield LEGACY_REP legacy.rep;
def bitfield LEGACY_LOCK legacy.lock;
def bitfield LEGACY_OP legacy.op;
def bitfield LEGACY_ADDR legacy.addr;
def bitfield LEGACY_SEG legacy.seg;
// Pieces of the opcode
def bitfield OPCODE_TYPE opcode.type;
def bitfield OPCODE_OP opcode.op;
//The top 5 bits of the opcode tend to split the instructions into groups
def bitfield OPCODE_OP_TOP5 opcode.op.top5;
def bitfield OPCODE_OP_BOTTOM3 opcode.op.bottom3;
// Immediate fields
def bitfield IMMEDIATE immediate;
def bitfield DISPLACEMENT displacement;
//Modifier bytes
def bitfield MODRM modRM;
def bitfield MODRM_MOD modRM.mod;
def bitfield MODRM_REG modRM.reg;
def bitfield MODRM_RM modRM.rm;
def bitfield SIB sib;
def bitfield SIB_SCALE sib.scale;
def bitfield SIB_INDEX sib.index;
def bitfield SIB_BASE sib.base;
def bitfield OPSIZE opSize;
def bitfield ADDRSIZE addrSize;
def bitfield STACKSIZE stackSize;
def bitfield MODE mode;
def bitfield MODE_MODE mode.mode;
def bitfield MODE_SUBMODE mode.submode;
def bitfield VEX_R vex.first.r;
def bitfield VEX_X vex.first.x;
def bitfield VEX_B vex.first.b;
def bitfield VEX_MAP vex.first.map_select;
def bitfield VEX_W vex.second.w;
def bitfield VEX_VVVV vex.second.vvvv;
def bitfield VEX_L vex.second.l;
def bitfield VEX_PP vex.second.pp;