Andreas Hansson 83a5977481 mem: Be less conservative in clearing load locks in the cache ... Avoid being overly conservative in clearing load locks in the cache, and allow writes to the line if they are from the same context. This is in line with ALPHA and ARM.		2016-02-10 04:08:25 -05:00
..
arch	x86: revamp cmpxchg8b/cmpxchg16b implementation	2016-02-06 17:21:20 -08:00
base	style: fix missing spaces in control statements	2016-02-06 17:21:19 -08:00
cpu	mem: Deduce if cache should forward snoops	2016-02-10 04:08:24 -05:00
dev	style: eliminate explicit boolean comparisons	2016-02-06 17:21:20 -08:00
doc	cpu: `Minor' in-order CPU model	2014-07-23 16:09:04 -05:00
doxygen	MEM: Put memory system document into doxygen	2012-09-25 11:49:41 -05:00
gpu-compute	gpu-compute: AMD's baseline GPU model	2016-01-19 14:28:22 -05:00
kern	misc: Remove redundant compiler-specific defines	2015-10-12 04:07:59 -04:00
mem	mem: Be less conservative in clearing load locks in the cache	2016-02-10 04:08:25 -05:00
proto	cpu: Support virtual addr in elastic traces	2015-12-07 16:42:16 -06:00
python	style: fix missing spaces in control statements	2016-02-06 17:21:19 -08:00
sim	style: fix missing spaces in control statements	2016-02-06 17:21:19 -08:00
unittest	style: remove trailing whitespace	2016-02-06 17:21:18 -08:00
Doxyfile	Doxygen: Update the version of the Doxyfile	2012-10-11 06:38:42 -04:00
SConscript	scons: always generate sim/tags.cc	2016-02-08 13:39:45 -06:00