76 lines
2.4 KiB
Python
76 lines
2.4 KiB
Python
# -*- mode:python -*-
|
|
|
|
# Copyright (c) 2006 The Regents of The University of Michigan
|
|
# All rights reserved.
|
|
#
|
|
# Redistribution and use in source and binary forms, with or without
|
|
# modification, are permitted provided that the following conditions are
|
|
# met: redistributions of source code must retain the above copyright
|
|
# notice, this list of conditions and the following disclaimer;
|
|
# redistributions in binary form must reproduce the above copyright
|
|
# notice, this list of conditions and the following disclaimer in the
|
|
# documentation and/or other materials provided with the distribution;
|
|
# neither the name of the copyright holders nor the names of its
|
|
# contributors may be used to endorse or promote products derived from
|
|
# this software without specific prior written permission.
|
|
#
|
|
# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
|
# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
|
# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
|
# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
|
# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
|
# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
|
# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
|
# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
|
# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
|
# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
|
# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
#
|
|
# Authors: Nathan Binkert
|
|
|
|
Import('*')
|
|
|
|
SimObject('Root.py')
|
|
SimObject('System.py')
|
|
SimObject('InstTracer.py')
|
|
|
|
Source('async.cc')
|
|
Source('compile_info.cc')
|
|
Source('core.cc')
|
|
Source('debug.cc')
|
|
Source('eventq.cc')
|
|
Source('faults.cc')
|
|
Source('main.cc')
|
|
Source('root.cc')
|
|
Source('serialize.cc')
|
|
Source('sim_events.cc')
|
|
Source('sim_object.cc')
|
|
Source('simulate.cc')
|
|
Source('startup.cc')
|
|
Source('stat_control.cc')
|
|
Source('system.cc')
|
|
|
|
if env['FULL_SYSTEM']:
|
|
Source('arguments.cc')
|
|
Source('pseudo_inst.cc')
|
|
else:
|
|
Source('tlb.cc')
|
|
SimObject('Process.py')
|
|
|
|
Source('process.cc')
|
|
Source('syscall_emul.cc')
|
|
|
|
TraceFlag('Config')
|
|
TraceFlag('Event')
|
|
TraceFlag('Fault')
|
|
TraceFlag('Flow')
|
|
TraceFlag('IPI')
|
|
TraceFlag('IPR')
|
|
TraceFlag('Interrupt')
|
|
TraceFlag('Loader')
|
|
TraceFlag('Stack')
|
|
TraceFlag('SyscallVerbose')
|
|
TraceFlag('TLB')
|
|
TraceFlag('Thread')
|
|
TraceFlag('Timer')
|
|
TraceFlag('VtoPhys')
|