gem5/src/arch
Korey Sewell 215041215b more steps toward O3 SMT
src/arch/mips/isa/formats/fp.isa:
    Adjust for newmem
src/cpu/cpu_models.py:
    Use O3DynInst instead of convoluted way
src/cpu/o3/alpha/impl.hh:
    take out O3DynInst typedef here ...
src/cpu/o3/cpu.cc:
    open up the SMT functions in the O3CPU
src/cpu/static_inst.hh:
    Add O3DynInst
src/cpu/o3/dyn_inst.hh:
    Use to get ISA-specific O3DynInst

--HG--
extra : convert_revision : 3713187ead93e336e80889e23a1f1d2f36d664fe
2006-07-06 11:25:44 -04:00
..
alpha Make full CPU handle SE faults 2006-06-27 14:59:38 -04:00
mips more steps toward O3 SMT 2006-07-06 11:25:44 -04:00
sparc add syscall emulation page table fault so we can allocate more stack pages 2006-06-26 16:49:05 -04:00
isa_parser.py Merging in a month of changes 2006-06-09 03:57:25 -04:00
isa_specific.hh Updated Authors from bk prs info 2006-05-31 19:26:56 -04:00
SConscript Fix up code to be able to use the Checker. 2006-06-17 22:01:30 -04:00