Mitch Hayenga c0d19391d4 arm: Squash after returning from exceptions in v7 ... Properly done for the ERET instruction in v8, but not for v7. Many control register changes are only visible after explicit instruction synchronization barriers or exception entry/exit. This means mode changing instructions should squash any younger in-flight speculative instructions.		2016-02-29 19:13:13 -06:00
..
arch	arm: Squash after returning from exceptions in v7	2016-02-29 19:13:13 -06:00
base	base: support gzip-compressed object files	2016-02-29 19:13:13 -06:00
cpu	cpu: TraceGen fix for tick frequency check	2016-02-24 04:16:55 -05:00
dev	dev, arm: Implement the NoMali reset callback	2016-02-23 11:49:35 +00:00
doc	cpu: `Minor' in-order CPU model	2014-07-23 16:09:04 -05:00
doxygen	MEM: Put memory system document into doxygen	2012-09-25 11:49:41 -05:00
gpu-compute	gpu: fix bugs with MemFence, Flat Instrs and Resource utilization	2016-02-18 10:42:03 -05:00
kern	misc: Remove redundant compiler-specific defines	2015-10-12 04:07:59 -04:00
mem	mem: Ensure that InvalidateReq is not forwarded as ReadExReq	2016-02-24 04:16:57 -05:00
proto	cpu: Support virtual addr in elastic traces	2015-12-07 16:42:16 -06:00
python	configs: add command-line option to stop debug output	2016-02-13 12:36:43 -05:00
sim	syscall_emul: Implement clock_getres() system call	2016-02-13 12:33:07 -05:00
unittest	style: remove trailing whitespace	2016-02-06 17:21:18 -08:00
Doxyfile	Doxygen: Update the version of the Doxyfile	2012-10-11 06:38:42 -04:00
SConscript	scons: Enable building with the gcc/clang Address Sanitizer	2016-02-17 03:56:20 -05:00