gem5/mem
Ali Saidi bb80f71f21 fixes for new memory system
SConscript:
    comment out most devices
    add vport.cc
arch/alpha/arguments.cc:
arch/alpha/arguments.hh:
    push in alpha name space
    fix for new memory system
arch/alpha/faults.cc:
arch/alpha/faults.hh:
    Added an unimplemented fault that can be returned if a certain
    function isn't implemented
arch/alpha/freebsd/system.cc:
arch/alpha/linux/system.cc:
arch/alpha/stacktrace.cc:
arch/alpha/system.cc:
arch/alpha/tlb.hh:
arch/alpha/tru64/system.cc:
    fixed for new memory system
arch/alpha/tlb.cc:
    fixed for new memory system
    removed code that seems to have no purpose
arch/alpha/vtophys.cc:
arch/alpha/vtophys.hh:
    fixed for new memory system
    put in namespace AlphaISA
base/remote_gdb.cc:
    fix for new memory system
cpu/cpu_exec_context.cc:
cpu/cpu_exec_context.hh:
cpu/exec_context.hh:
    create two ports one of physical accesses and one for superpage accesses
    Add functions getVirtPort() getPhysPort() delVirtPort(). To get statically
    allocated physical or virtual ports or if an execcontext is passed in
    get a dynamically allocated virtual port
dev/alpha_console.cc:
dev/alpha_console.hh:
    Redo for new memory system
dev/io_device.cc:
dev/io_device.hh:
    new I/O devices for new memory system
kern/linux/events.cc:
kern/linux/printk.cc:
kern/linux/printk.hh:
kern/tru64/dump_mbuf.hh:
kern/tru64/printf.cc:
kern/tru64/printf.hh:
    Arguments now in namespaces
kern/tru64/tru64_events.cc:
mem/bus.cc:
    fix for new memory syste
mem/physical.hh:
    new addressranges function
    getPort should be public
mem/port.hh:
    Add write/read methods to functional port
    update getDeviceAddrRanges to have a list of both snoops and response lists
sim/pseudo_inst.cc:
sim/system.cc:
sim/system.hh:
    Update for new mem system
sim/vptr.hh:
    comment out code and replace with panics
    This will need to be fixed at some point, but it's not easy.

--HG--
extra : convert_revision : 41f41f422cfbab3751284d55cccb6ea64a7956e2
2006-04-06 00:51:46 -04:00
..
cache/prefetch Remove unneeded header files. 2006-03-14 18:03:34 -05:00
config Don't forget to check in the needed header file for the conditional prefetch building. 2006-03-16 11:34:19 -05:00
bus.cc fixes for new memory system 2006-04-06 00:51:46 -04:00
bus.hh Add the bus and connector objects to scons 2006-03-26 21:44:22 -05:00
mem_object.cc Replace Memory with MemObject; no need for two different levels of hierarchy there. 2006-03-12 17:21:59 -05:00
mem_object.hh Add the bus and connector objects to scons 2006-03-26 21:44:22 -05:00
packet.hh move stuff around so PageShift is defined before it is needed 2006-03-29 17:37:25 -05:00
page_table.cc SimpleCPU compiles with merge. 2006-03-09 19:21:35 -05:00
page_table.hh SimpleCPU compiles with merge. 2006-03-09 19:21:35 -05:00
physical.cc Make TranslatingPort be a type of Port rather than something special 2006-03-30 15:59:49 -05:00
physical.hh fixes for new memory system 2006-04-06 00:51:46 -04:00
port.cc Get rid of "Functional" suffix from (read|write)(Blob|String) functions. 2006-03-12 16:38:16 -05:00
port.hh fixes for new memory system 2006-04-06 00:51:46 -04:00
request.hh Implement a very very simple bus 2006-03-25 18:31:20 -05:00
translating_port.cc Make TranslatingPort be a type of Port rather than something special 2006-03-30 15:59:49 -05:00
translating_port.hh Add a functional port that is used to load the original binaries in FS 2006-03-30 18:06:00 -05:00
vport.cc fixes for new memory system 2006-04-06 00:51:46 -04:00
vport.hh fixes for new memory system 2006-04-06 00:51:46 -04:00