f05cb84ed1
This patch adds a connector that allows gem5 to be used as a component in SST (Structural Simulation Toolkit, sst-simulator.org). At a high level, this allows memory traffic to pass between the two simulators. SST Links are roughly analogous to gem5 Ports, although Links do not have a notion of master and slave. This distinction is important to gem5, so when connecting a gem5 CPU to an SST cache, an ExternalSlave must be used, and similarly when connecting the memory side of SST cache to a gem5 port (for memory <-> I/O), an ExternalMaster must be used. These connectors handle the administrative aspects of gem5 (initialization, simulation, shutdown) as well as translating SST's MemEvents into gem5 Packets and vice-versa.
20 lines
529 B
Makefile
20 lines
529 B
Makefile
# These two variables are designed to be modifiable.
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SST_VERSION=SST-trunk
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GEM5_LIB=gem5_opt
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LDFLAGS=-shared -fno-common ${shell pkg-config ${SST_VERSION} --libs} -L../../build/ARM
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CXXFLAGS=-std=c++0x -g -O2 -fPIC ${shell pkg-config ${SST_VERSION} --cflags} ${shell python-config --includes} -I../../build/ARM
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CPPFLAGS+=-MMD -MP
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SRC=$(wildcard *.cc)
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.PHONY: clean all
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all: libgem5.so
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libgem5.so: $(SRC:%.cc=%.o)
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${CXX} ${CPPFLAGS} ${LDFLAGS} $? -o $@ -l${GEM5_LIB}
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-include $(SRC:%.cc=%.d)
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clean:
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${RM} *.[do] libgem5.so
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