b6ff600bca
execution pipeline (Alpha trapb & excb). Add support for write memory barriers (mostly impacts store buffer). Add StaticInst flag to indicate memory barriers, though this is not modeled in the pipeline yet. arch/alpha/isa_desc: Implement trapb, excb, mb, and wmb as insts with no execution effect (empty execute() function) but with flags that indicate their side effects. Also make sure every instruction that needs to go to the execute stage has a real opClass value, since we are now using No_OpClass to signal insts that can get dropped at dispatch. StaticInst::branchTarget() is now a const method. cpu/static_inst.hh: Add flags to indicate serializing insts (trapb, excb) and memory and write barriers. Also declare some StaticInst methods as const methods. dev/etherlink.hh: sim/eventq.hh: sim/serialize.cc: sim/serialize.hh: sim/sim_object.hh: Make name() return value const. --HG-- extra : convert_revision : 39520e71469fa20e0a7446b2e06b494eec17a02c |
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.. | ||
async.hh | ||
builder.cc | ||
builder.hh | ||
debug.cc | ||
debug.hh | ||
eventq.cc | ||
eventq.hh | ||
host.hh | ||
main.cc | ||
param.cc | ||
param.hh | ||
process.cc | ||
process.hh | ||
serialize.cc | ||
serialize.hh | ||
sim_events.cc | ||
sim_events.hh | ||
sim_exit.hh | ||
sim_object.cc | ||
sim_object.hh | ||
syscall_emul.cc | ||
syscall_emul.hh | ||
system.cc | ||
system.hh | ||
universe.cc |