gem5/src
Kevin Lim af7315c7dc Fix caches plus sampling switch over.
src/cpu/o3/cpu.cc:
    Fix up caches plus sampling switch over.

--HG--
extra : convert_revision : 49d0c16d4c5e8d5ba83749d568a4efe3b42e3a97
2006-10-09 19:13:06 -04:00
..
arch there are two main thrusts of this changeset. 2006-10-06 01:27:02 -04:00
base add annotation code to m5 2006-09-11 17:57:20 -04:00
cpu Fix caches plus sampling switch over. 2006-10-09 19:13:06 -04:00
dev Merge ktlim@zamp:./local/clean/o3-merge/m5 2006-09-30 23:43:23 -04:00
doxygen Fix up doxygen. 2006-08-14 19:25:07 -04:00
kern Finished changing how stat structures are translated, fixed the handling of various ids as LiveProcess parameters. 2006-09-17 03:00:55 -04:00
mem Update memory assertion to check for whole range. 2006-10-09 00:09:44 -04:00
python Clean up configs. 2006-10-08 01:12:42 -04:00
sim Merge zizzer:/bk/newmem 2006-10-06 21:46:04 -04:00
unittest Merge iceaxe.:/Volumes/work/research/m5/head 2006-06-11 22:01:34 -04:00
Doxyfile Fix up doxygen. 2006-08-14 19:25:07 -04:00
SConscript Updates to bring MemTest closer to working with newmem. Ron still needs to do the initial setup and configuration for it to work properly. 2006-10-07 13:37:22 -04:00