89ea323250
Prefetching is not enabled in any of our regressions, so no significant stat values have changed, but zero-valued prefetch stats no longer show up when prefetching is disabled so there are noticable changes in the reference stat files anyway.
34 lines
3 KiB
Text
34 lines
3 KiB
Text
|
|
---------- Begin Simulation Statistics ----------
|
|
host_inst_rate 3515833 # Simulator instruction rate (inst/s)
|
|
host_mem_usage 203260 # Number of bytes of host memory used
|
|
host_seconds 113.39 # Real time elapsed on the host
|
|
host_tick_rate 1757913715 # Simulator tick rate (ticks/s)
|
|
sim_freq 1000000000000 # Frequency of simulated ticks
|
|
sim_insts 398664595 # Number of instructions simulated
|
|
sim_seconds 0.199332 # Number of seconds simulated
|
|
sim_ticks 199332411500 # Number of ticks simulated
|
|
system.cpu.dtb.accesses 168275274 # DTB accesses
|
|
system.cpu.dtb.acv 0 # DTB access violations
|
|
system.cpu.dtb.hits 168275218 # DTB hits
|
|
system.cpu.dtb.misses 56 # DTB misses
|
|
system.cpu.dtb.read_accesses 94754510 # DTB read accesses
|
|
system.cpu.dtb.read_acv 0 # DTB read access violations
|
|
system.cpu.dtb.read_hits 94754489 # DTB read hits
|
|
system.cpu.dtb.read_misses 21 # DTB read misses
|
|
system.cpu.dtb.write_accesses 73520764 # DTB write accesses
|
|
system.cpu.dtb.write_acv 0 # DTB write access violations
|
|
system.cpu.dtb.write_hits 73520729 # DTB write hits
|
|
system.cpu.dtb.write_misses 35 # DTB write misses
|
|
system.cpu.idle_fraction 0 # Percentage of idle cycles
|
|
system.cpu.itb.accesses 398664824 # ITB accesses
|
|
system.cpu.itb.acv 0 # ITB acv
|
|
system.cpu.itb.hits 398664651 # ITB hits
|
|
system.cpu.itb.misses 173 # ITB misses
|
|
system.cpu.not_idle_fraction 1 # Percentage of non-idle cycles
|
|
system.cpu.numCycles 398664824 # number of cpu cycles simulated
|
|
system.cpu.num_insts 398664595 # Number of instructions executed
|
|
system.cpu.num_refs 174183453 # Number of memory references
|
|
system.cpu.workload.PROG:num_syscalls 215 # Number of system calls
|
|
|
|
---------- End Simulation Statistics ----------
|