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Andreas Hansson abcbc4e51e mem: Adjust cache queue reserve to more conservative values
The cache queue reserve is there as an overflow to give us enough
headroom based on when we block the cache, and how many transactions
we may already have accepted before actually blocking. The previous
values were probably chosen to be "big enough", when we actually know
that we check the MSHRs after every single allocation, and for the
write buffers we know that we implicitly may need one entry for every
outstanding MSHR.
* * *
mem: Adjust cache queue reserve to more conservative values

The cache queue reserve is there as an overflow to give us enough
headroom based on when we block the cache, and how many transactions
we may already have accepted before actually blocking. The previous
values were probably chosen to be "big enough", when we actually know
that we check the MSHRs after every single allocation, and for the
write buffers we know that we implicitly may need one entry for every
outstanding MSHR.
2016-03-17 09:51:22 -04:00
build_opts gpu-compute: AMD's baseline GPU model 2016-01-19 14:28:22 -05:00
configs configs: Add a lat_mem_rd style test script 2016-03-08 17:51:02 -05:00
ext ext: fix SST connector 2016-02-04 16:57:59 -06:00
src mem: Adjust cache queue reserve to more conservative values 2016-03-17 09:51:22 -04:00
system arm: Ship Linux device trees with gem5 2016-02-23 11:21:07 +00:00
tests stats: Bump stats to match cache changes 2016-03-17 09:51:21 -04:00
util misc: Fix argument handling for m5 initparam util 2016-03-16 16:23:42 +00:00
.gitignore misc: Add a gitignore file based on the current hgignore 2016-03-16 17:20:00 +00:00
.hgignore misc: ignore object files and static libs in util/m5 2015-11-13 17:03:48 -05:00
.hgtags Added tag stable_2015_09_03 for changeset 60eb3fef9c2d 2015-09-03 15:38:46 -05:00
COPYING copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
LICENSE copyright: Add code for finding all copyright blocks and create a COPYING file 2011-06-02 17:36:07 -07:00
README misc: README direct to website for dependencies 2014-08-26 10:12:04 -04:00
SConstruct scons: Enable building with the gcc/clang Address Sanitizer 2016-02-17 03:56:20 -05:00

This is the gem5 simulator.

The main website can be found at http://www.gem5.org

A good starting point is http://www.gem5.org/Introduction, and for
more information about building the simulator and getting started
please see http://www.gem5.org/Documentation and
http://www.gem5.org/Tutorials.

To build gem5, you will need the following software: g++ or clang,
Python (gem5 links in the Python interpreter), SCons, SWIG, zlib, m4,
and lastly protobuf if you want trace capture and playback
support. Please see http://www.gem5.org/Dependencies for more details
concerning the minimum versions of the aforementioned tools.

Once you have all dependencies resolved, type 'scons
build/<ARCH>/gem5.opt' where ARCH is one of ALPHA, ARM, NULL, MIPS,
POWER, SPARC, or X86. This will build an optimized version of the gem5
binary (gem5.opt) for the the specified architecture. See
http://www.gem5.org/Build_System for more details and options.

With the simulator built, have a look at
http://www.gem5.org/Running_gem5 for more information on how to use
gem5.

The basic source release includes these subdirectories:
   - configs: example simulation configuration scripts
   - ext: less-common external packages needed to build gem5
   - src: source code of the gem5 simulator
   - system: source for some optional system software for simulated systems
   - tests: regression tests
   - util: useful utility programs and files

To run full-system simulations, you will need compiled system firmware
(console and PALcode for Alpha), kernel binaries and one or more disk
images. Please see the gem5 download page for these items at
http://www.gem5.org/Download

If you have questions, please send mail to gem5-users@gem5.org

Enjoy using gem5 and please share your modifications and extensions.