abc76f20cb
creation and initialization now happens in python. Parameter objects are generated and initialized by python. The .ini file is now solely for debugging purposes and is not used in construction of the objects in any way. --HG-- extra : convert_revision : 7e722873e417cb3d696f2e34c35ff488b7bff4ed
218 lines
6.6 KiB
C++
218 lines
6.6 KiB
C++
/*
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* Copyright (c) 2004-2005 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Erik Hallnor
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*/
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/**
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* @file
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* Definition of a memory trace CPU object for optimal caches. Uses a memory
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* trace to access a fully associative cache with optimal replacement.
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*/
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#include <algorithm> // For heap functions.
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#include "cpu/trace/opt_cpu.hh"
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#include "cpu/trace/reader/mem_trace_reader.hh"
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#include "params/OptCPU.hh"
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#include "sim/sim_events.hh"
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using namespace std;
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OptCPU::OptCPU(const string &name,
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MemTraceReader *_trace,
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int block_size,
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int cache_size,
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int _assoc)
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: SimObject(name), tickEvent(this), trace(_trace),
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numBlks(cache_size/block_size), assoc(_assoc), numSets(numBlks/assoc),
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setMask(numSets - 1)
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{
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int log_block_size = 0;
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int tmp_block_size = block_size;
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while (tmp_block_size > 1) {
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++log_block_size;
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tmp_block_size = tmp_block_size >> 1;
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}
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assert(1<<log_block_size == block_size);
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MemReqPtr req;
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trace->getNextReq(req);
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refInfo.resize(numSets);
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while (req) {
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RefInfo temp;
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temp.addr = req->paddr >> log_block_size;
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int set = temp.addr & setMask;
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refInfo[set].push_back(temp);
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trace->getNextReq(req);
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}
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// Initialize top level of lookup table.
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lookupTable.resize(16);
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// Annotate references with next ref time.
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for (int k = 0; k < numSets; ++k) {
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for (RefIndex i = refInfo[k].size() - 1; i >= 0; --i) {
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Addr addr = refInfo[k][i].addr;
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initTable(addr, InfiniteRef);
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refInfo[k][i].nextRefTime = lookupValue(addr);
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setValue(addr, i);
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}
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}
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// Reset the lookup table
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for (int j = 0; j < 16; ++j) {
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if (lookupTable[j].size() == (1<<16)) {
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for (int k = 0; k < (1<<16); ++k) {
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if (lookupTable[j][k].size() == (1<<16)) {
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for (int l = 0; l < (1<<16); ++l) {
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lookupTable[j][k][l] = -1;
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}
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}
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}
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}
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}
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tickEvent.schedule(0);
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hits = 0;
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misses = 0;
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}
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void
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OptCPU::processSet(int set)
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{
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// Initialize cache
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int blks_in_cache = 0;
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RefIndex i = 0;
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cacheHeap.clear();
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cacheHeap.resize(assoc);
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while (blks_in_cache < assoc) {
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RefIndex cache_index = lookupValue(refInfo[set][i].addr);
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if (cache_index == -1) {
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// First reference to this block
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misses++;
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cache_index = blks_in_cache++;
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setValue(refInfo[set][i].addr, cache_index);
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} else {
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hits++;
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}
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// update cache heap to most recent reference
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cacheHeap[cache_index] = i;
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if (++i >= refInfo[set].size()) {
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return;
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}
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}
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for (int start = assoc/2; start >= 0; --start) {
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heapify(set,start);
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}
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//verifyHeap(set,0);
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for (; i < refInfo[set].size(); ++i) {
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RefIndex cache_index = lookupValue(refInfo[set][i].addr);
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if (cache_index == -1) {
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// miss
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misses++;
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// replace from cacheHeap[0]
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// mark replaced block as absent
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setValue(refInfo[set][cacheHeap[0]].addr, -1);
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setValue(refInfo[set][i].addr, 0);
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cacheHeap[0] = i;
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heapify(set, 0);
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// Make sure its in the cache
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assert(lookupValue(refInfo[set][i].addr) != -1);
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} else {
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// hit
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hits++;
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assert(refInfo[set][cacheHeap[cache_index]].addr ==
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refInfo[set][i].addr);
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assert(refInfo[set][cacheHeap[cache_index]].nextRefTime == i);
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assert(heapLeft(cache_index) >= assoc);
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cacheHeap[cache_index] = i;
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processRankIncrease(set, cache_index);
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assert(lookupValue(refInfo[set][i].addr) != -1);
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}
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}
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}
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void
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OptCPU::tick()
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{
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// Do opt simulation
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int references = 0;
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for (int set = 0; set < numSets; ++set) {
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if (!refInfo[set].empty()) {
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processSet(set);
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}
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references += refInfo[set].size();
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}
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// exit;
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fprintf(stderr,"sys.cpu.misses %d #opt cache misses\n",misses);
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fprintf(stderr,"sys.cpu.hits %d #opt cache hits\n", hits);
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fprintf(stderr,"sys.cpu.accesses %d #opt cache acceses\n", references);
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exitSimLoop("end of memory trace reached");
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}
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void
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OptCPU::initTable(Addr addr, RefIndex index)
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{
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int l1_index = (addr >> 32) & 0x0f;
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int l2_index = (addr >> 16) & 0xffff;
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assert(l1_index == addr >> 32);
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if (lookupTable[l1_index].size() != (1<<16)) {
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lookupTable[l1_index].resize(1<<16);
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}
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if (lookupTable[l1_index][l2_index].size() != (1<<16)) {
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lookupTable[l1_index][l2_index].resize(1<<16, index);
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}
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}
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OptCPU::TickEvent::TickEvent(OptCPU *c)
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: Event(&mainEventQueue, CPU_Tick_Pri), cpu(c)
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{
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}
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void
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OptCPU::TickEvent::process()
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{
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cpu->tick();
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}
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const char *
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OptCPU::TickEvent::description()
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{
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return "OptCPU tick event";
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}
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OptCPU *
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OptCPUParams::create()
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{
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return new OptCPU(name, data_trace, block_size, size, assoc);
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}
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