b642ad00eb
--HG-- extra : convert_revision : d08b740d32757fa5471c9bcde9084d59a1d8102d
77 lines
2.8 KiB
C++
77 lines
2.8 KiB
C++
/*
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* Copyright (c) 2004-2006 The Regents of The University of Michigan
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Kevin Lim
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*/
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#include "arch/alpha/types.hh"
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#include "cpu/o3/thread_context.hh"
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template <class Impl>
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class AlphaTC : public O3ThreadContext<Impl>
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{
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public:
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#if FULL_SYSTEM
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/** Returns pointer to the quiesce event. */
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virtual EndQuiesceEvent *getQuiesceEvent()
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{
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return this->thread->quiesceEvent;
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}
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#endif
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virtual uint64_t readNextNPC()
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{
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return this->readNextPC() + sizeof(TheISA::MachInst);
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}
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virtual void setNextNPC(uint64_t val)
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{
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panic("Alpha has no NextNPC!");
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}
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virtual void changeRegFileContext(TheISA::RegContextParam param,
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TheISA::RegContextVal val)
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{ panic("Not supported on Alpha!"); }
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/** This function exits the thread context in the CPU and returns
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* 1 if the CPU has no more active threads (meaning it's OK to exit);
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* Used in syscall-emulation mode when a thread executes the 'exit'
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* syscall.
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*/
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virtual int exit()
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{
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this->deallocate();
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// If there are still threads executing in the system
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if (this->cpu->numActiveThreads())
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return 0; // don't exit simulation
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else
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return 1; // exit simulation
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}
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};
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