a928a438b8
Used cppclean to help identify useless includes and removed them. This involved erroneously included headers, but also cases where forward declarations could have been used rather than a full include.
378 lines
13 KiB
C++
378 lines
13 KiB
C++
/*
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* Copyright (c) 2007 The Hewlett-Packard Development Company
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* All rights reserved.
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*
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* The license below extends only to copyright in the software and shall
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* not be construed as granting a license to any other intellectual
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* property including but not limited to intellectual property relating
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* to a hardware implementation of the functionality of the software
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* licensed hereunder. You may use the software subject to the license
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* terms below provided that you ensure that this notice is replicated
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* unmodified and in its entirety in all distributions of the software,
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* modified or unmodified, in source code or in binary form.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are
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* met: redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer;
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* redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution;
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* neither the name of the copyright holders nor the names of its
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* contributors may be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Authors: Gabe Black
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*/
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#include "arch/x86/system.hh"
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#include "arch/x86/bios/intelmp.hh"
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#include "arch/x86/bios/smbios.hh"
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#include "arch/x86/isa_traits.hh"
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#include "base/loader/object_file.hh"
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#include "cpu/thread_context.hh"
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#include "params/X86System.hh"
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using namespace LittleEndianGuest;
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using namespace X86ISA;
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X86System::X86System(Params *p) :
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System(p), smbiosTable(p->smbios_table),
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mpFloatingPointer(p->intel_mp_pointer),
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mpConfigTable(p->intel_mp_table),
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rsdp(p->acpi_description_table_pointer)
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{
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}
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void
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X86ISA::installSegDesc(ThreadContext *tc, SegmentRegIndex seg,
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SegDescriptor desc, bool longmode)
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{
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uint64_t base = desc.baseLow + (desc.baseHigh << 24);
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bool honorBase = !longmode || seg == SEGMENT_REG_FS ||
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seg == SEGMENT_REG_GS ||
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seg == SEGMENT_REG_TSL ||
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seg == SYS_SEGMENT_REG_TR;
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uint64_t limit = desc.limitLow | (desc.limitHigh << 16);
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SegAttr attr = 0;
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attr.dpl = desc.dpl;
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attr.unusable = 0;
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attr.defaultSize = desc.d;
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attr.longMode = desc.l;
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attr.avl = desc.avl;
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attr.granularity = desc.g;
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attr.present = desc.p;
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attr.system = desc.s;
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attr.type = desc.type;
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if (desc.s) {
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if (desc.type.codeOrData) {
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// Code segment
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attr.expandDown = 0;
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attr.readable = desc.type.r;
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attr.writable = 0;
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} else {
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// Data segment
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attr.expandDown = desc.type.e;
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attr.readable = 1;
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attr.writable = desc.type.w;
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}
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} else {
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attr.readable = 1;
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attr.writable = 1;
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attr.expandDown = 0;
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}
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tc->setMiscReg(MISCREG_SEG_BASE(seg), base);
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tc->setMiscReg(MISCREG_SEG_EFF_BASE(seg), honorBase ? base : 0);
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tc->setMiscReg(MISCREG_SEG_LIMIT(seg), limit);
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tc->setMiscReg(MISCREG_SEG_ATTR(seg), (MiscReg)attr);
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}
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void
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X86System::initState()
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{
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System::initState();
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if (!kernel)
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fatal("No kernel to load.\n");
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if (kernel->getArch() == ObjectFile::I386)
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fatal("Loading a 32 bit x86 kernel is not supported.\n");
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ThreadContext *tc = threadContexts[0];
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// This is the boot strap processor (BSP). Initialize it to look like
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// the boot loader has just turned control over to the 64 bit OS. We
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// won't actually set up real mode or legacy protected mode descriptor
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// tables because we aren't executing any code that would require
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// them. We do, however toggle the control bits in the correct order
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// while allowing consistency checks and the underlying mechansims
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// just to be safe.
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const int NumPDTs = 4;
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const Addr PageMapLevel4 = 0x70000;
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const Addr PageDirPtrTable = 0x71000;
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const Addr PageDirTable[NumPDTs] =
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{0x72000, 0x73000, 0x74000, 0x75000};
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const Addr GDTBase = 0x76000;
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const int PML4Bits = 9;
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const int PDPTBits = 9;
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const int PDTBits = 9;
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/*
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* Set up the gdt.
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*/
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uint8_t numGDTEntries = 0;
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// Place holder at selector 0
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uint64_t nullDescriptor = 0;
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physProxy.writeBlob(GDTBase + numGDTEntries * 8,
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(uint8_t *)(&nullDescriptor), 8);
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numGDTEntries++;
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SegDescriptor initDesc = 0;
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initDesc.type.codeOrData = 0; // code or data type
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initDesc.type.c = 0; // conforming
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initDesc.type.r = 1; // readable
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initDesc.dpl = 0; // privilege
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initDesc.p = 1; // present
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initDesc.l = 1; // longmode - 64 bit
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initDesc.d = 0; // operand size
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initDesc.g = 1; // granularity
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initDesc.s = 1; // system segment
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initDesc.limitHigh = 0xFFFF;
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initDesc.limitLow = 0xF;
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initDesc.baseHigh = 0x0;
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initDesc.baseLow = 0x0;
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//64 bit code segment
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SegDescriptor csDesc = initDesc;
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csDesc.type.codeOrData = 1;
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csDesc.dpl = 0;
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//Because we're dealing with a pointer and I don't think it's
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//guaranteed that there isn't anything in a nonvirtual class between
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//it's beginning in memory and it's actual data, we'll use an
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//intermediary.
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uint64_t csDescVal = csDesc;
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physProxy.writeBlob(GDTBase + numGDTEntries * 8,
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(uint8_t *)(&csDescVal), 8);
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numGDTEntries++;
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SegSelector cs = 0;
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cs.si = numGDTEntries - 1;
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tc->setMiscReg(MISCREG_CS, (MiscReg)cs);
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//32 bit data segment
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SegDescriptor dsDesc = initDesc;
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uint64_t dsDescVal = dsDesc;
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physProxy.writeBlob(GDTBase + numGDTEntries * 8,
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(uint8_t *)(&dsDescVal), 8);
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numGDTEntries++;
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SegSelector ds = 0;
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ds.si = numGDTEntries - 1;
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tc->setMiscReg(MISCREG_DS, (MiscReg)ds);
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tc->setMiscReg(MISCREG_ES, (MiscReg)ds);
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tc->setMiscReg(MISCREG_FS, (MiscReg)ds);
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tc->setMiscReg(MISCREG_GS, (MiscReg)ds);
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tc->setMiscReg(MISCREG_SS, (MiscReg)ds);
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tc->setMiscReg(MISCREG_TSL, 0);
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tc->setMiscReg(MISCREG_TSG_BASE, GDTBase);
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tc->setMiscReg(MISCREG_TSG_LIMIT, 8 * numGDTEntries - 1);
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SegDescriptor tssDesc = initDesc;
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uint64_t tssDescVal = tssDesc;
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physProxy.writeBlob(GDTBase + numGDTEntries * 8,
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(uint8_t *)(&tssDescVal), 8);
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numGDTEntries++;
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SegSelector tss = 0;
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tss.si = numGDTEntries - 1;
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tc->setMiscReg(MISCREG_TR, (MiscReg)tss);
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installSegDesc(tc, SYS_SEGMENT_REG_TR, tssDesc, true);
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/*
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* Identity map the first 4GB of memory. In order to map this region
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* of memory in long mode, there needs to be one actual page map level
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* 4 entry which points to one page directory pointer table which
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* points to 4 different page directory tables which are full of two
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* megabyte pages. All of the other entries in valid tables are set
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* to indicate that they don't pertain to anything valid and will
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* cause a fault if used.
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*/
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// Put valid values in all of the various table entries which indicate
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// that those entries don't point to further tables or pages. Then
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// set the values of those entries which are needed.
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// Page Map Level 4
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// read/write, user, not present
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uint64_t pml4e = X86ISA::htog(0x6);
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for (int offset = 0; offset < (1 << PML4Bits) * 8; offset += 8) {
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physProxy.writeBlob(PageMapLevel4 + offset, (uint8_t *)(&pml4e), 8);
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}
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// Point to the only PDPT
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pml4e = X86ISA::htog(0x7 | PageDirPtrTable);
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physProxy.writeBlob(PageMapLevel4, (uint8_t *)(&pml4e), 8);
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// Page Directory Pointer Table
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// read/write, user, not present
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uint64_t pdpe = X86ISA::htog(0x6);
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for (int offset = 0; offset < (1 << PDPTBits) * 8; offset += 8) {
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physProxy.writeBlob(PageDirPtrTable + offset,
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(uint8_t *)(&pdpe), 8);
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}
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// Point to the PDTs
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for (int table = 0; table < NumPDTs; table++) {
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pdpe = X86ISA::htog(0x7 | PageDirTable[table]);
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physProxy.writeBlob(PageDirPtrTable + table * 8,
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(uint8_t *)(&pdpe), 8);
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}
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// Page Directory Tables
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Addr base = 0;
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const Addr pageSize = 2 << 20;
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for (int table = 0; table < NumPDTs; table++) {
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for (int offset = 0; offset < (1 << PDTBits) * 8; offset += 8) {
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// read/write, user, present, 4MB
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uint64_t pdte = X86ISA::htog(0x87 | base);
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physProxy.writeBlob(PageDirTable[table] + offset,
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(uint8_t *)(&pdte), 8);
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base += pageSize;
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}
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}
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/*
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* Transition from real mode all the way up to Long mode
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*/
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CR0 cr0 = tc->readMiscRegNoEffect(MISCREG_CR0);
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//Turn off paging.
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cr0.pg = 0;
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tc->setMiscReg(MISCREG_CR0, cr0);
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//Turn on protected mode.
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cr0.pe = 1;
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tc->setMiscReg(MISCREG_CR0, cr0);
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CR4 cr4 = tc->readMiscRegNoEffect(MISCREG_CR4);
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//Turn on pae.
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cr4.pae = 1;
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tc->setMiscReg(MISCREG_CR4, cr4);
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//Point to the page tables.
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tc->setMiscReg(MISCREG_CR3, PageMapLevel4);
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Efer efer = tc->readMiscRegNoEffect(MISCREG_EFER);
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//Enable long mode.
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efer.lme = 1;
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tc->setMiscReg(MISCREG_EFER, efer);
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//Start using longmode segments.
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installSegDesc(tc, SEGMENT_REG_CS, csDesc, true);
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installSegDesc(tc, SEGMENT_REG_DS, dsDesc, true);
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installSegDesc(tc, SEGMENT_REG_ES, dsDesc, true);
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installSegDesc(tc, SEGMENT_REG_FS, dsDesc, true);
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installSegDesc(tc, SEGMENT_REG_GS, dsDesc, true);
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installSegDesc(tc, SEGMENT_REG_SS, dsDesc, true);
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//Activate long mode.
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cr0.pg = 1;
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tc->setMiscReg(MISCREG_CR0, cr0);
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tc->pcState(tc->getSystemPtr()->kernelEntry);
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// We should now be in long mode. Yay!
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Addr ebdaPos = 0xF0000;
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Addr fixed, table;
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//Write out the SMBios/DMI table
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writeOutSMBiosTable(ebdaPos, fixed, table);
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ebdaPos += (fixed + table);
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ebdaPos = roundUp(ebdaPos, 16);
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//Write out the Intel MP Specification configuration table
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writeOutMPTable(ebdaPos, fixed, table);
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ebdaPos += (fixed + table);
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}
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void
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X86System::writeOutSMBiosTable(Addr header,
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Addr &headerSize, Addr &structSize, Addr table)
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{
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// If the table location isn't specified, just put it after the header.
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// The header size as of the 2.5 SMBios specification is 0x1F bytes
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if (!table)
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table = header + 0x1F;
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smbiosTable->setTableAddr(table);
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smbiosTable->writeOut(physProxy, header, headerSize, structSize);
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// Do some bounds checking to make sure we at least didn't step on
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// ourselves.
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assert(header > table || header + headerSize <= table);
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assert(table > header || table + structSize <= header);
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}
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void
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X86System::writeOutMPTable(Addr fp,
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Addr &fpSize, Addr &tableSize, Addr table)
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{
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// If the table location isn't specified and it exists, just put
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// it after the floating pointer. The fp size as of the 1.4 Intel MP
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// specification is 0x10 bytes.
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if (mpConfigTable) {
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if (!table)
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table = fp + 0x10;
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mpFloatingPointer->setTableAddr(table);
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}
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fpSize = mpFloatingPointer->writeOut(physProxy, fp);
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if (mpConfigTable)
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tableSize = mpConfigTable->writeOut(physProxy, table);
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else
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tableSize = 0;
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// Do some bounds checking to make sure we at least didn't step on
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// ourselves and the fp structure was the size we thought it was.
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assert(fp > table || fp + fpSize <= table);
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assert(table > fp || table + tableSize <= fp);
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assert(fpSize == 0x10);
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}
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X86System::~X86System()
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{
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delete smbiosTable;
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}
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X86System *
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X86SystemParams::create()
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{
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return new X86System(this);
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}
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