a91ee5abc2
Special Regs (Hi,Lo,FCSR) are now added to the operands for use in decoder.isa.
Now it's back to just debugging execution of code for the release (those unaligned
memory access instruction pairs are still quite the pain i might add)
arch/mips/isa_traits.hh:
declare functions for .cc file
arch/mips/isa_traits.cc:
delete unnecessary overloaded functions
implement condition code functions
implement round function
arch/mips/isa/base.isa:
remove R31 constant... define in the operands.isa file instead
arch/mips/isa/decoder.isa:
wholesale changes once again to FP.
Now the FP Condition Codes are implemented and the FP programs can
run and complete to finish.
Use isnan() instead of my unorderedFP() function
Also, we now access special regs such as HI,LO,FCSR,etc. just like we do any other reg. operand
arch/mips/isa/operands.isa:
add more operands for special control regs in int and FP regfiles
arch/mips/isa/formats/branch.isa:
use R31 instead of r31
arch/mips/isa/formats/fp.isa:
use MakeCCVector to set Condition Codes in FCSR
arch/mips/regfile/float_regfile.hh:
treat control regs like any other reg. Just Index them after the regular architectural registers
arch/mips/regfile/int_regfile.hh:
treat hi,lo as regular int. regs w/special indexing
arch/mips/regfile/regfile.hh:
no longer need for special register accesses with their own function.
--HG--
rename : arch/mips/regfile.hh => arch/mips/regfile/regfile.hh
extra : convert_revision : 5d2f8fdb59606de2b2e9db3e0a085240561e479e
109 lines
4 KiB
C++
109 lines
4 KiB
C++
// -*- mode:c++ -*-
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////////////////////////////////////////////////////////////////////
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//
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// Floating Point operate instructions
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//
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output header {{
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/**
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* Base class for FP operations.
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*/
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class FPOp : public MipsStaticInst
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{
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protected:
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/// Constructor
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FPOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass)
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{
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}
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std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const;
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};
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}};
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output decoder {{
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std::string FPOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const
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{
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return "Disassembly of integer instruction\n";
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}
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}};
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// Primary format for float operate instructions:
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def format FloatOp(code, *flags) {{
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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def format FloatCompareOp(code, *flags) {{
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code = 'bool cond;\n' + code
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code += 'FCSR = makeCCVector(FCSR, CC,cond);\n'
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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def format FloatCompareWithXcptOp(code, *flags) {{
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code = 'bool cond;\n' + code
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code += 'FCSR = makeCCVector(FCSR, CC,cond);\n'
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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def format FloatConvertOp(code, *flags) {{
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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// Primary format for float64 operate instructions:
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def format Float64Op(code, *flags) {{
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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def format Float64ConvertOp(code, *flags) {{
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code = 'bool cond;\n' + code
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code += 'FCSR = makeCCVector(FCSR, CC,cond);\n'
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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def format FloatPSCompareOp(code, *flags) {{
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code = 'bool cond1;\nbool cond2;\n' + code
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code += 'FCSR = makeCCVector(FCSR, CC+1, cond1);\n'
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code += 'FCSR = makeCCVector(FCSR, CC, cond2);\n'
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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def format FloatPSCompareWithXcptOp(code, *flags) {{
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code = 'bool cond1;\nbool cond2;\n' + code
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code += 'FCSR = makeCCVector(FCSR, CC+1, cond1);\n'
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code += 'FCSR = makeCCVector(FCSR, CC, cond2);\n'
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iop = InstObjParams(name, Name, 'MipsStaticInst', CodeBlock(code), flags)
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header_output = BasicDeclare.subst(iop)
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decoder_output = BasicConstructor.subst(iop)
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decode_block = BasicDecode.subst(iop)
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exec_output = BasicExecute.subst(iop)
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}};
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